Publications

Many of the publications listed below are copyrighted by IEEE or ACM. LCA owns copyrights of all unpublished manuscripts listed below. Personal use of these materials is permitted. However, permission to reprint or replublish these materials for resale or redistribution purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works,must be obtained from the IEEE/ACM/LCA.

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Rethinking TLB Designs in Virtualized Environments: A Very Large Part-of-Memory TLB [PDF]
Jee Ho Ryoo, Nagendra Gulur, Shuang Song, and Lizy K. John.
International Symposium on Computer Architecture (ISCA). June 2017.
Statistical Pattern Based Modeling of GPU Memory Access Streams
Reena Panda, Xinnian Zheng, Jiajun Wang, Andreas Gerstlauer, and Lizy K. John.
Design Automation Conference (DAC). June 2017.
Cloud-guided QoS and Energy Management for Mobile Interactive Web Applications [PDF]
Wooseok Lee, Dam Sunwoo, Andreas Gerstlauer, and Lizy K. John.
Mobile Software Engineering and Systems (MOBILESoft). May 2017.
Exploring Heterogeneous-ISA Core Architectures for High-Performance Energy-Efficient Mobile SoCs (Poster) [PDF]
Wooseok Lee, Dam Sunwoo, Christopher D. Emmons, Andreas Gerstlauer, and Lizy K. John.
Great Lakes Symposium on VLSI (GLSVLSI). May 2017.
Fine-Grain Program Snippets Generator for Mobile Core Design [PDF]
Shuang Song, Raj Desikan Mohamad Barakat, Sridhar Sundaram, Andreas Gerstlauer, and Lizy K. John.
Great Lakes Symposium on VLSI (GLSVLSI). May 2017.
Accurate Address Streams for LLC and Beyond (SLAB): A Methodology to Enable System Exploration
Reena Panda, Xinnian Zheng, and Lizy K. John.
International Symposium on Performance Analysis of Systems and Software (ISPASS) . April 2017.
Prefetching for Cloud Workloads: An Analysis Based on Address Patterns (Best Paper Nominee) [PDF]
Jiajun Wang, Reena Panda, Xinnian Zheng, and Lizy K. John.
International Symposium on Performance Analysis of Systems and Software (ISPASS) . April 2017.
Proxy benchmarks for emerging big-data workloads (Poster) [PDF]
Reena Panda and Lizy K. John.
International Symposium on Performance Analysis of Systems and Software (ISPASS) . April 2017.
Exploring Opportunities for Heterogeneous-ISA Core Architectures in High-Performance Mobile SoCs [PDF]
Wooseok Lee, Dam Sunwoo, Christopher D. Emmons, Andreas Gerstlauer, and Lizy K. John.
Tech Report UT-CERC-17-01. March 2017.
High-Level Synthesis of Approximate Hardware under Joint Precision and Voltage Scaling [PDF]
Seogoo Lee, Lizy K. John, and Andreas Gerstlauer.
Design, Automation and Test in Europe (DATE) . March 2017.
Sampling-Based Binary-Level Cross-Platform Performance Estimation
Xinnian Zheng, Haris Vikalo, Shuang Song, Lizy K. John, and Andreas Gerstlauer.
Conference for Design, Automation and Test in Europe (DATE). March 2017.
SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory Organization [PDF]
Jee Ho Ryoo, Mitesh R. Meswani, and Lizy K. John.
The IEEE Symposium on High Performance Computer Architecture (HPCA). February 2017.


Fine-grained Power Analysis of Emerging Graph Processing Workloads for Cloud Operations Management
Shuang Song, Xinnian Zheng, Andreas Gerstlauer, and Lizy K. John.
The IEEE Big Data for Cloud Operations Management Workshop (BDCOM). December 2016.
Identifying Performance Bottlenecks in Hive: Use of Processor Counters
Alexander C. Shulyak and Lizy K. John.
The IEEE Big Data for Cloud Operations Management Workshop (BDCOM). December 2016.
Extended Task Queuing: Active Messages for Heterogeneous Systems [Link]
Michael LeBeane, Brandon Potter, Abhisek Pan, Alexandru Dutu, Vinay Agarwala, Wonchan Lee, Deepak Majeti, Bibek Ghimire, Eric Van Tassell, Samuel Wasmundt, Brad Benton, Mauricio Breternitz, Michael L. Chu, Mithuna Thottethodi, Lizy K. John, and Steven K. Reinhardt.
The International Conference for High Performance Computing, Networking, Storage, and Analysis (SC). November 2016.
SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory Organization (poster) [Link]
Jee Ho Ryoo, Mitesh R. Meswani, Reena Panda, and Lizy K. John.
The IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT). September 2016.
Optimizing GPGPU Kernel Summation for Performance and Energy Efficiency [PDF]
Jiajun Wang, Ahmed Khawaja, George Biros, Andreas Gerstlauer, and Lizy K. John.
Workshop on Heterogeneous and Unconventional Cluster Architectures and Applications (HUCAA). August 2016.
Proxy-Guided Load Balancing of Graph Processing Workloads on Heterogeneous Clusters [Link]
Shuang Song, Meng Li, Xinnian Zheng, Jee Ho Ryoo, Reena Panda, Michael LeBeane, Andreas Gerstlauer, and Lizy K. John.
The IEEE International Conference on Parallel Processing (ICPP). August 2016.
Genesys: Automatically Generating Representative Training-sets
Reena Panda, Xinnian Zheng, Jee Ho Ryoo, Michael LeBeane, Shuang Song, Andreas Gerstlauer, and Lizy K. John.
The IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS). July 2016.
Accurate Phase-Level Cross-Platform Power and Performance Estimation (Best Paper Award) [Link]
Xinnian Zheng, Lizy K. John, and Andreas Gerstlauer.
Design Automation Conference (DAC). June 2016.
Prefetching Techniques for Near-memory Throughput Processors [Link]
Reena Panda, Yasuko Eckert, Nuwan Jayasena, Onur Kayiran, Michael Boyer, and Lizy K. John.
The ACM International Conference on Supercomputing (ICS). June 2016.


Data Partitioning Strategies for Graph Workloads on Heterogeneous Clusters [Link]
Michael LeBeane, Shuang Song, Reena Panda, Jee Ho Ryoo, and Lizy K. John.
The IEEE International Conference for High Performance Computing, Networking, Storage and Analysis (SC). November 2015.
Performance Characterization of Modern Databases on Out-of-order CPUs [PDF]
Reena Panda, Christopher Erb, Michael LeBeane, Jee Ho Ryoo, and Lizy K. John.
The IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2015.
WattWatcher: Fine-Grained Power Estimation For Emerging Workloads [PDF]
Michael LeBeane, Jee Ho Ryoo, Reena Panda, and Lizy K. John.
The IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2015.
i-MIRROR: A Software Managed Die-Stacked DRAM-Based Memory Subsystem [PDF]
Jee Ho Ryoo, Karthik Ganesan, Yaomin Chen, and Lizy K. John.
The IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2015.
GPGPU Benchmark Suites: How Well Do They Sample the Performance Spectrum (Best Paper Runner-Up) [PDF]
Jee Ho Ryoo, Saddam Quirem, Michael LeBeane, Reena Panda, Shuang Song, and Lizy K. John.
The IEEE International Conference on Parallel Processing (ICPP). September 2015.
WattWatcher: Fine-Grained Power Estimation on Live Multicore Systems Using Configurable Models (Best in Session)
Michael LeBeane, Jee Ho Ryoo, Reena Panda, and Lizy K. John.
SRC TECHCON. September 2015.
Learning-basd Analytical Cross-Platform Performance Prediction (Best Paper Award) [PDF]
Xinnian Zheng, Pradeep Ravikumar, Lizy K. John, and Andreas Gerstlauer.
The IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS). July 2015.
PowerTrain: A Learning-based Calibration of McPAT Power Models [PDF]
Wooseok Lee, Youngchun Kim, Jee Ho Ryoo, Dam Sunwoo, Andreas Gerstlauer, and Lizy K. John.
The IEEE International Symposium on Low Power Electronics and Design (ISLPED). July 2015.
Big Versus Little: Who Will Trip? [PDF]
Reena Panda, Christopher Erb, and Lizy K. John.
Silicon Errors in Logic - System Effects (SELSE). March 2015.


Data Analytics Workloads: Characterization and Similarity Analysis [Link]
Reena Panda and Lizy K. John.
The IEEE International Performance Computing and Communications Conference (IPCCC). December 2014.
Performance Analysis of HPC Applications with Irregular Tree Data Structures [PDF]
Ahmed Khawaja, Jiajun Wang, Andreas Gerstlauer, Lizy K. John, Dhairya Malhotra, and George Biros.
The IEEE International Conference on Parallel and Distributed Systems (ICPADS). December 2014.
Control Flow Behavior of Cloud Workloads (Poster)
Jee Ho Ryoo, Michael LeBeane, Muhammad Faisal Iqbal, and Lizy K. John.
The IEEE International Symposium on Workload Characterization (IISWC). October 2014.
FastSpot: Host-Compiled Thermal Estimation for Early Design Space Exploration [PDF]
Darshan Gandhi, Andreas Gerstlauer, and Lizy K. John.
The IEEE International Symposium on Quality Electronic Design (ISQED). March 2014.
Predictive Heterogeneity-Aware Application Scheduling for Chip Multiprocessors [PDF]
Jian Chen, Arun A. Nair, and Lizy K. John.
IEEE Transactions on Computer. February 2014.


Performance Boosting under Reliability and Power Constraints [PDF]
Youngtaek Kim, Lizy K. John, Indrani Paul, Srilatha Manne, and Michael Schulte.
The IEEE/ACM International Conference on Computer-Aided Design (ICCAD). November 2013.
Flow Migration on Multicore Network Processors: Load Balancing While Minimizing Packet Reordering [PDF]
Muhammad Faisal Iqbal, Jim Holt, Jee Ho Ryoo, Gustavo de Veciana, and Lizy K. John.
The IEEE International Conference on Parallel Processing (ICPP). October 2013.
Workload-Aware Network Processors: Improving Performance While Minimizing Power Consumption [PDF]
Muhammad Faisal Iqbal.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2013.
Store-Load Branch (SLB) Predictor: A Compiler Assisted Branch Prediction for Data Dependent Branches [PDF]
Muhammad Umar Farooq, Khubaib, and Lizy K. John.
The 19th IEEE International Symposium on High Performance Computer Architecture. March 2013.
Cache Friendliness Aware Management of Last-level Caches for High Performance Multi-core Systems [PDF]
Dimitris Kaseridis, Muhammad Faisal Iqbal, and Lizy K. John.
IEEE Transactions on Computer. January 2013.


AUDIT: Stress Testing the Automatic Way [PDF]
Youngtaek Kim, Sanjay Pant, Srilatha Manne, Michael Schulte, Lloyd Bircher, Madhu Saravana Sibi Govindan, and Lizy K. John.
The 45th International Symposium on Microarchitecture (MICRO'45). December 2012.
Performance Impact of Virtual Machine Placement in a Datacenter [PDF]
Indrani Paul, Sudhakar Yalamanchili, and Lizy K. John.
The 31st International Performance Computing and Communications Conference. December 2012.
Efficient Traffic Aware Power Management for Multicore Communications Processors [PDF]
Muhammad Faisal Iqbal and Lizy K. John.
Symposium on Architectures for Networking and Communication Systems (ANCS). October 2012.
Impact of compiler optimizations on voltage droops and reliability of an SMT, multi-core processor [PDF]
Youngtaek Kim and Lizy K. John.
The 1st International Workshop on Secure and Resilient Architectures and Systems (SRAS) in conjunction with PACT 2012. September 2012.
Predictive Hetrogeneity-Aware Application Scheduling for Chip Multiprocessors [PDF]
Jian Chen, Arun A. Arun, and Lizy K. John.
IEEE Transactions on Computer. August 2012.
A First-Order Mechanistic Model for Architectural Vulnerability Factor [PDF]
Arun A. Nair, Stijn Eyerman, Lieven Eeckhout, and Lizy K. John.
The 39th Interenational Symposium on Computer Architecture (ISCA-39). June 2012.
Efficient Modeling of Soft Error Vulnerability in Microprocessors [PDF]
Arun Arvind Nair.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2012.
The Feasibility of Memory Encryption and Authentication [PDF]
Donald Edward Owen Jr..
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2012.
Complete System Power Estimation using Processor Performance Events [PDF]
W. Lloyd Bircher and Lizy K. John.
IEEE Transactions on Computers. April 2012.
Power and Performance Analysis of Network Traffic Prediction Techniques [PDF]
Muhammad Faisal Iqbal and Lizy K. John.
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). April 2012.
Automated di/dt stressmark generation for microprocessor power distribution networks [PDF]
Youngtaek Kim and Lizy K. John.
Silicon Errors in Logic - System Effects (SELSE). March 2012.
Compiler Support for Value-based Indirect Branch Prediction [PDF]
Muhammad Umar Farooq, Lei Chen, and Lizy K. John.
The 21st International Conference on Compiler Construction (CC). March 2012.
Core-Level Activity Prediction for Multicore Power Management [PDF]
W. Lloyd Bircher and Lizy K. John.
To appear in IEEE on Emerging and Selected Topics in Circuits and Systems. 2012.


Automatic Generation of Synthetic Workloads for Multicore Systems [PDF]
Karthik Ganesan.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2011.
Minimalist Open-page: A DRAM Page-mode Scheduling Policy for the Many-core Era (Best Paper Nominee) [PDF]
Dimitris Kaseridis, Jeffrey Stuecheli, and Lizy K. John.
44th International Symposium on Microarchitecture (MICRO'44) . December 2011.
Autocorrelation Analysis: A New and Improved Method for Branch Predictability Characterization [PDF]
Jian Chen and Lizy K. John.
IEEE International Symposium on Workload Characterization . November 2011.
MAximum Multicore POwer (MAMPO) - An Automatic Multithreaded Synthetic Power Virus Generation Framework for Multicore Systems (Best paper finalist) [PDF]
Karthik Ganesan and Lizy K. John.
in the SuperComputing conference (SC 2011). November 2011.
MCFQ: Leveraging Memory-level Parallelism and Application's Cache Friendliness for Efficient Management of Quasi-partitioned Last-level Caches (Poster) [PDF]
Dimitris Kaseridis, Muhammad Faisal Iqbal, Jeffrey Stuecheli, and Lizy John.
Parallel Architecture and Compilation Techniques (PACT). October 2011.
Automated di/dt stressmark generation for microprocessor power delivery networks [PDF]
Youngtaek Kim and Lizy K. John.
The International Symposium on Low Power Electronics and Design (ISLPED). August 2011.
Autocorrelation Analysis: A New and Improved Method for Measuring Branch Predictability [PDF]
Jian Chen and Lizy K. John.
International Symposium on Measurement and Modeling of Computer System (SIGMETRICS) . June 2011.
Modeling Program Resource Demand Using Inherent Program Characteristics [PDF]
Jian Chen, Lizy K. John, and Dimitris Kaseridis.
International Symposium on Measurement and Modeling of Computer System (SIGMETRICS) . June 2011.
Predictive Coordination of Multiple On-chip Resources for Chip Multiprocessors [PDF]
Jian Chen and Lizy K. John.
The 25th International Symposium on Supercomputing (ICS) . June 2011.
Mitigating DRAM Complexities Through Coordinated Scheduling Policies [PDF]
Jeffrey Adam Stuecheli.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2011.
The Use of Memory State Knowledge to Improve Computer Memory System Organization [PDF]
Ciji Isen.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2011.
Coordinating DRAM and Last-Level-Cache Policies with the Virtual Write Queue
Jeffery Stuecheli, Dimitris Kaseridis, Lizy K. John, David Daly, and Hillery C. Hunter.
IEEE Micro. Vol. 31. No. 1. pp 90-98. January 2011.


Confusion by All Means (A Study on Benchmark Means) [PDF]
Muhammad Faisal Iqbal and Lizy K. John.
Workshop on Unique Chips and Systems (UCAS) in conjunction with the 43rd IEEE/ACM International Symposium on Microarchitecture. December 2010.


AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-case Vulnerability to Soft Errors [PDF]
Arun A. Nair, Lizy K. John, and Lieven Eeckhout.
The 43rd Interenational Symposium on Microchitecture. December 2010.
Elastic Refresh: Techniques to Mitigate Refresh Penalties in High Density Memory [PDF]
Jeff Stuecheli, Dimitris Kaseridis, David Daly, Hillery Hunter, and Lizy K. John.
The 43rd Interenational Symposium on Microchitecture. December 2010.
Predictive Power Management for Multi-Core Processors [PDF]
William Lloyd Bircher.
Department of Electrical and Computer Engineering, The University of Texas at Austin. September 2010.
System-level Max Power (SYMPO) - A Systematic Approach for Escalating System Level Power Consumption Using Synthetic Benchmarks [PDF]
Karthik Ganesan, Jungho Jo, W. Lloyld Bircher, Dimitrics Kaseridis, Zhibin Yu, and Lizy K. John.
in 19th International Conference on Parallel Architecture and Compilation Techniques (PACT). September 2010.
The Virtual Write Queue: Coordinating DRAM and Last-Level Cache Policies [PDF]
Jeff Stuecheli, Dimitris Kaseridis, David Daly, Hillery Hunter, and Lizy K. John.
The 37th Interenational Symposium on Computer Architecture. June 2010.
Synthesizing Memory-Level Parallelism Aware Miniature Clones for SPEC CPU2006 and ImplantBench Workloads [PDF]
Karthik Ganesan, Jungho Jo, and Lizy K. John.
2010 International Symposium on Performance Analysis of Systems and Software. March 2010.
Bandwidth-aware Memory-subsystem Resource Management using Non-invasive Resource Profilers for Large CMP Systems [PDF]
Dimitris Kaseridis, Jeffrey Stuecheli, Jian Chen, and Lizy K. John.
The 16th International Symposium on High-performance Computer Architecture . January 2010.
Value Based BTB Indexing (VBBI) for Indirect Jump Prediction (Best Paper Nominee) [PDF]
Muhammad Umar Farooq, Lei Chen, and Lizy K. John.
The 16th Interenational Symposium on High-Performance Computer Architecture. January 2010.


ESKIMO - Energy Savings using Semantic Knowledge of Inconsequential Memory Occupancy for DRAM subsystem [PDF]
Ciji Isen and Lizy K. John.
The 42nd Annual IEEE/ACM International Symposium on Microarchitecture. December 2009.
Bank-aware Dynamic Cache Partitioning for Multicore Architectures (Best Paper Award) [PDF]
Dimitris Kaseridis, Jeffrey Stuecheli, and Lizy K. John.
The 38th International Conference on Parallel Processing . September 2009.
TSS:Applying Two Stage Sampling in Micro-architecture Simulations [PDF]
Zhibin Yu, Hai Jin, Jian Chen, and Lizy K. John.
17th International Symposium on Modelling, Analysis and Simulation of Computer and Telecommunication Systems . September 2009.
Efficient Program Scheduling for Heterogeneous Multi-core Processors [PDF]
Jian Chen and Lizy K. John.
46th Design Automation Conference. July 2009.
Enhanced Hierarchical Instruction Scheduling for Tiled Dataflow Architectures [PDF]
Muhammad Umar Farooq and Lizy K. John.
Interenational Conference on Compiler Construction. March 2009.
A Tale of Two Processors: Revisiting the RISC-CISC Debate [PDF]
Ciji Isen and Lizy John.
2009 SPEC Benchmark Workshop. January 2009.
Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architecdtures [PDF]
Muhammad Umar Farooq, Lizy K. John, and Margarida F. Jacome.
4th Interenational Conference on High Performance and Embedded Architectures and Compilers. January 2009.
Generation,Validation and Analysis of SPEC CPU2006 Simulation Points Based on Branch, Memory, and TLB Characteristics [PDF]
Karthik Ganesan, Deepak Panwar, and Lizy John.
2009 SPEC Benchmark Workshop. January 2009.


Simulation Points for SPEC 2006 [PDF]
Arun A. Nair and Lizy John.
International Conference on Computer Design (ICCD'08). October 2008.
A Performance Counter Based Workload Characterization on BlueGene/P [PDF]
Karthik Ganesan, Lizy K. John, James Sexton, and Valentina Salapura.
37th International Conference on Parallel Processing. September 2008.
Energy-aware Application Scheduling on a Heterogeneous Multi-core System [PDF]
Jian Chen and Lizy K. John.
IEEE International Symposium on Workload Characterization. September 2008.
On the Representativeness of Embedded Java Benchmarks [PDF]
Ciji Isen, Lizy K. John, Jung Pil Choi, and Hyo Jung Song.
IEEE International Symposium on Workload Characterization. September 2008.
Analysis of Dynamic Power Management on Multi-core Processors [PDF]
W. Lloyd Bircher and Lizy John.
22th ACM Interenational Conference on Supercomputing. June 2008.
Next-Generation Performance Counters: Monitoring Over Thousand Concurrent Events [PDF]
Valentina Salapura, Karthik Ganesan, Alan Gara , Michael Gschwind, James C. Sexton, and Robert E. Walkup.
2008 International Symposium on Performance Analysis of Systems and Software. April 2008.
Automated Microprocessor Stressmark Generation [PDF]
Ajay Joshi, Lieven Eeckhout, Lizy K. John, and Ciji Isen.
The 14th International Symposium on High Performance Computer Architecture (HPCA) . February 2008.
On the Object Orientedness of C++ Programs in SPEC CPU 2006 [PDF]
Ciji Isen and Lizy John.
2008 SPEC Benchmark Workshop. January 2008.
The Return of Synthetic Benchmark [PDF]
Ajay M. Joshi, Lieven Eeckhout, and Lizy John.
2008 SPEC Benchmark Workshop. January 2008.


Constructing Adaptable and Scalable Synthetic Benchmarks for Microprocessor Performance Evaluation [PDF]
Ajay M. Joshi.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2007.
Applying Statistical Sampling for Fast and Efficient Simulation of Commercial Workloads
Ajay Joshi, Yue Luo, and Lizy John.
IEEE Transactions on Computers. pp 1520-1533. November 2007.
Analysis of Redundency and Application Balance in the SPEC CPU2006 Benchmark Suite [PDF]
Aashish Phansalkar, Ajay Joshi, and Lizy K. John.
The 34th International Symposium on Computer Architecture (ISCA) . June 2007.
Measuring Program Similarity for Efficient Benchmarking and Performance Analysis of Computer Systems [PDF]
Aashish S. Phansalkar.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2007.
Complete System Power Estimation: A Trickle-Down Approach Based on Performance Events [PDF]
W. Lloyd Bircher and Lizy K.John.
International Symposium on Performance Analysis of Systems and Software. April 2007.
Mapping of Applications to Heterogeneous Multi-cores Based on Micro-architecture Independent Characteristics [PDF]
Jian Chen, Nidhi Nayyar, and Lizy K. John.
Third Workshop on Unique Chips and Systems,ISPASS2007. April 2007.
CMP/CMT Scaling of SPECjbb2005 on UltraSPARC T1 [PDF]
Dimitris Kaseridis and Lizy K. John.
Tenth Workshop on Computer Architecture Evaluation using Commercial Workloads. February 2007.
Hardware Efficient Piecewise Linear Branch Predictor [PDF]
Jiajin Tu, Jian Chen, and Lizy K. John.
20th International Conference on VLSI Design. January 2007.


Evaluating Benchmark Subsetting Approaches [PDF]
Joshua J.Yi, Resit Sendag, Lieven Eeckhout, Ajay Joshi, David J. Lilja, and Lizy K. John.
International Symposium on Workload Characterization. October 2006.
Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks [PDF]
Ajay Joshi, Lieven Eeckhout, Robert H.Bell Jr., and Lizy K. John.
International Symposium on Workload Characterization. October 2006.
The DaCapo Benchmarks:Java Benchmarking Development and Analysis [PDF]
Stephen M.Blackburn, Robin Garner, Chris Hoffmann, Asjad M. Khan, Kathryn S. McKinley, Rotem Bentzur, Amer Diwan, Daniel Feinberg, Daniel Frampton, Samuel Z.Guyer, Martin Hirzel, Antony Hosking, Maria Jump, Han Lee, J Eliot B Moss, Aashish Phansalkar, Darko Stefanovic, Thomas VanDrunen, Daniel von Dincklage, and Ben Wiedermann.
Object Oriented Programming Systems,Languages and Applications 2006(OOPSLA'06). October 2006.
Performance Prediction Based on Inherent Program Similarity [PDF]
Kenneth Hoste, Aashish Phansalkar, Lieven Eeckhout, Andy Georges, Lizy K. John, and Koen De Bosschere.
15th International Conference on Parallel Architecture and COmpilation Techniques (PACT) . September 2006.
Avoiding Store Misses To Fully Modified Cache Blocks [PDF]
Shiwen Hu and Lizy K. John.
IEEE International Performance Computing and Communications Conference. April 2006.
OS-aware Tuning: Improving Instruction Cache Energy Efficiency on System Workloads [PDF]
Tao Li and Lizy K. John.
IEEE International Performance Computing and Communications Conference. April 2006.
Automatic Testcase Synthesis and Performance Model Validation for High Performance PowerPC Processors [PDF]
Robert H. Bell, Jr, Rajiv R. Bhatia, Lizy K. John, Jeff Stuecheli, John Griswell, Paul Tu, Louis Capps, Anton Blanchard, and Ravel Thai.
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). March 2006.
Evaluating the Efficacy of Statistical Simulation for Early Design Space Exploration
Ajay Joshi, Joshua Yi, Robert H. Bell, Jr, Lieven Eeckhout, Lizy K. John, and David Lilja.
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). March 2006.
Measuring Benchmark Similarity Using Inherent Program Characteristics [PDF]
Ajay Joshi, Aashish Phansalkar, Lieven Eeckhout, and Lizy John.
Tech Report TR-060201-01. February 2006.
Analyzing the Processor Bottlenecks in SPEC CPU 2000 [PDF]
Joshua J. Yi, Ajay Joshi, Resit Sendag, Lieven Eeckhout, and David J. Lilja.
2006 SPEC Benchmark Workshop. January 2006.
Performance Prediction Using Program Similarity [PDF]
Aashish Phansalkar and Lizy John.
2006 SPEC Benchmark Workshop. January 2006.
Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation
Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy K. John, and Joydeep Ghosh.
Accepted in International Journal of High Performance Computing and Networking. Vol. . No. . pp -. 2006.
Architectural Enhancements for Network Congestion Control Applications
Byeong Kil Lee, , Lizy K. John, and Eugene John.
Accepted at IEEE Transactions on VLSI. Vol. . No. . pp -. 2006.
Measuring Benchmark Similarity Using Inherent Program Characteristics
Ajay Joshi, Aashish Phansalkar, Lieven Eeckhout, and Lizy K. John.
Accepted at IEEE Transactions on Computers. Vol. . No. . pp -. 2006.
OS-aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems
Tao Li, Lizy K. John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, and Juan Rubio.
Accepted at IEEE Transactions on Computers. Vol. . No. . pp -. 2006.
Operating System Power Minimization through Run-time Processor Resource Adaptation [PDF]
Tao Li and Lizy K. John.
Journal of Microprocessor and Microsystems. Vol. 30. No. 4. pp 173-224. 2006.


Automatic Workload Synthesis for Early Design Studies and Performance Model Validation [PDF]
Robert H. Bell, Jr.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2005.
Efficient Adaptation of Multiple Microprocessor Resources for Energy Reduction Using Dynamic Optimization [PDF]
Shiwen Hu.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2005.
Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation [PDF]
Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy John, and Joydeep Ghosh.
17th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2005.
Efficient Power Analysis using Synthetic Testcases [PDF]
Robert H. Bell, Jr. and Lizy K. John.
IEEE International Symposium on Workload Characterization. October 2005.
Reducing Server Data Traffic using a Hierarchical Computation Model
Juan Rubio and Lizy K. John.
IEEE Transactions on Parallel and Distributed Systems. Vol. 16. No. 10. pp 933-943. October 2005.
Simulating Commercial Java Throughput Workloads: A Case Study
Yue Luo and Lizy John.
International Conference on Computer Design (ICCD'05). October 2005.
Improving Sampled Microprocessor Simulation [PDF]
Yue Luo.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2005.
Network Processor Design: Benchmarks and Architectural Alternatives [PDF]
Byeong Kil Lee.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2005.
Runtime Identification of Microprocessor Energy Saving Opportunities [PDF]
W. Lloyd Bircher, Madhavi Valluri, Lizy John, and Jason Law.
International Symposium on Low Power Electronics and Design. pp 275-280. August 2005.
Architectural Support for Accelerating Congestion Control Applications in Network Processors
Byeong Kil Lee, Lizy K. John, and Eugene John.
IEEE 16th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2005). July 2005.
Implications of Executing Compression and Encryption Applications on General Purpose Processors
Byeong Kil Lee and Lizy K. John.
IEEE Transactions on Computers. Vol. 54. No. 7. pp 917-922. July 2005.
Simulating Java Commercial Throughput Workload: A Case Study [PDF]
Yue Luo and Lizy John.
Tech Report TR-050710-01. July 2005.
Adapting Branch-Target Buffer to Improve the Target Predictability of Java Code
Tao Li, Ravi Bhargava, and Lizy K. John.
ACM Transactions on Architecture and Code Optimization (TACO) . Vol. 2. No. 2. June 2005.
Improved Automatic Testcase Synthesis for Performance Model Validation [PDF]
Robert H. Bell, Jr. and Lizy K. John.
19th ACM International Conference on Supercomputing. June 2005.
Low Power, Low Complexity Instruction Issue Using Compiler Assistance [PDF]
Madhavi Valluri, Lizy K. John, and Kathryn McKinley.
19th ACM International Conference on Supercomputing. June 2005.
The Case for Automatic Synthesis of Miniature Benchmarks [PDF]
Robert H. Bell Jr. and Lizy K. John.
Workshop on Modeling, Benchmarking, and Simulation (held with ISCA-32). June 2005.
[HTML]
Lieven Eeckhout, Yue Luo, Koen De Bosschere, and Lizy K. John.
The Computer Journal. Vol. 48. No. 4. pp 451-459. May 2005.
A Hybrid-Scheduling Approach for Energy-Efficient Superscalar Processors [PDF]
Madhavi Valluri.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2005.
Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation [PDF]
Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy John, and Joydeep Ghosh.
Tech Report TR-050301-01. March 2005.
Effective Adaptive Computing Environment Management via Dynamic Optimization [PDF]
Shiwen Hu, Madhavi Valluri, and Lizy K. John.
International Symposium on Code Generation and Optimization. March 2005.
Measuring Program Similarity: Experiments with SPEC CPU Benchmark Suites [PDF]
Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John.
IEEE International Symposium on Performance Analysis of Systems and Software. March 2005.
Measuring Program Similarity [PDF]
Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John.
Tech Report TR-050127-01. January 2005.
Computer Performance Evaluation and Benchmarking
Edited by Lizy John and Lieven Eeckhout.
CRC Press. 2005.


Effective Use of Performance Monitoring Counters for Run-Time Prediction of Power [PDF]
W. L. Bircher, Jason Law, Madhavi Valluri, and Lizy K. John.
Tech Report TR-041104-01. November 2004.
Four Generations of SPEC CPU Benchmarks: What has changed and what has not [PDF]
Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John.
Tech Report TR-041026-01-1. October 2004.
Improving Server Performance on Transaction Processing Workloads by Enhanced Data Placement [PDF]
Juan Rubio, Charles Lefurgy, and Lizy K. John.
16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2004.
Self-Monitored Adaptive Cache Warm-Up for Microprocessor Simulation [PDF]
Yue Luo, Lizy K. John, and Lieven Eeckhout.
16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2004.
Efficiently Evaluating Speedup Using Sampled Processor Simulation [PDF]
Yue Luo and Lizy K. John.
Computer Architecture Letters. Vol. 3. September 2004.
Experiments in Automatic Benchmark Synthesis [PDF]
Robert H. Bell, Jr. and Lizy K. John.
Tech Report TR-040817-01. August 2004.
Exploring the Potential of a Hierarchical Computing Model for a Commercial Server [PDF]
Juan Rubio.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2004.
OS-aware Architecture for Improving Microprocessor Performance and Energy Efficiency [PDF]
Tao Li.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2004.
Analysis of the Execution of a Next Generation Application on Superscalar and Grid Processors [PDF]
Juan Rubio and Lizy John.
IEEE International Conference on Parallel and Distributed Systems. July 2004.
Scaling to the End of Silicon with EDGE architectures
Doug Burger, Steve Keckler, Katherine S. McKinley, M. Dahlin, Lizy K. John, Calvin Lin, C. R. Moore, J. Burrill, Robert G. McDonald, William Yoder, and The TRIPS team.
IEEE Computer. pp 44-55. July 2004.
Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies [PDF]
Lieven Eeckhout, Robert H. Bell, Jr., Bastiaan Stougie, Koen De Bosschere, and Lizy K. John.
International Symposium on Computer Architecture (ISCA). pp 350-361. June 2004.
Deconstructing and Improving Statistical Simulation in HLS [PDF]
Robert H. Bell Jr., Lieven Eeckhout, Lizy K. John, and Koen De Bosschere.
3rd Annual Workshop on Duplicating, Deconstructing, and Debunking (WDDD). June 2004.
Locality Based On-Line Trace Compression
Yue Luo and Lizy K. John.
IEEE Transactions on Computers. Vol. 53. No. 6. pp 723-731. June 2004.
Understanding the data memory behavior of benchmarks using Principal Components Analysis [PDF]
Saket Kumar.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2004.
Hybrid-Scheduling: A Compile-Time Approach for Energy-Efficient Superscalar Processors (poster) [PDF] [PPT]
Madhavi Valluri and Lizy John.
IBM Austin Conference on Energy-Efficient Design (ACEED) 2004. March 2004.
More on Finding a Single Number to Indicate Overall Performance of a Benchmark Suite
Lizy K. John.
ACM Computer Architecture News. Vol. 32. No. 1. pp 3-8. March 2004.
Keynote Speech [PDF]
Lizy K. John.
Seventh Workshop on Computer Architecture Evaluation Using Commercial Workloads (CAECW-7). February 2004.
Using Statistical Theory to Study Issues in Microprocessor Simulation [PDF]
Yue Luo and Lizy K. John.
Tech Report TR-0400225-01. February 2004.
Using Statistical Theory to Study Issues in Microprocessor Simulation [PDF]
Yue Luo and Lizy K. John.
5th Annual Austin Center for Advanced Studies Conference. February 2004.
Analyzing Program Behavior of SPECint2000 Benchmark Suite using Principal Components Analysis [PDF]
Aashish Phansalkar and Lizy K. John.
Tech Report TR-040122-01. January 2004.
More on finding a Single Number to indicate Overall Performance of a Benchmark Suite [PDF]
Lizy K. John.
Tech Report TR-040126-01. January 2004.
Power Modeling in SDRAMs [PDF]
Ajay Joshi, Srirarm Sambamurthy, Saket Kumar, and Lizy John.
Tech Report TR-040126-02. January 2004.


Characterizing Microprocessor Benchmarks Towards Understanding the Workload Design Space [PDF]
Michael Arunkumar.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2003.
Memory Access and Computational Behavior of MP3 Encoding [PDF]
Michael Lance Karm.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2003.
Solutions to High-End Signal Processing Applications
Patrick James Peters.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2003.
Basic Block Simulation Granularity, Basic Block Maps, and Benchmark Synthesis Using Statistical Simulation [PDF]
Robert H. Bell, Jr. and Lizy K. John.
Tech Report TR-031119-01. November 2003.
The Role of Return Values in Exploiting Speculative Method-Level Parallelism [HTML]
Shiwen Hu, Ravi Bhargava, and Lizy K. John.
The Journal of Instruction-Level Parallelism. Vol. 5. November 2003.
NpBench: A Benchmark Suite for Control Plane and Data Plane Applications for Network Processors [PDF]
Byeong Kil Lee and Lizy John.
International Conference on Computer Design (ICCD'03). October 2003.
Bottlenecks in multimedia processing with SIMD style extensions and architectural enhancements
Deepu Talla, Lizy K. John, and Doug Burger.
IEEE Transactions on Computers. Vol. 52. No. 8. pp 1015-1031. August 2003.
Development and Characterization of Control-plane Network Workloads [PDF]
Byeong Kil Lee and Lizy K. John.
Tech Report TR-030827-01. August 2003.
Exploiting compiler-generated schedules for energy savings in high-performance processors [PDF]
Madhavi Valluri, Lizy John, and Heather Hanson.
International Symposium on Low Power Electronics and Design (ISLPED'03). August 2003.
Facts and myths about media processing on general-purpose processors (Invited Paper)
Deepu Talla and Lizy John.
IEEE International Conference on Information Technology: Research and Education (Special Session on Technology and Trends in Media Processing). August 2003.
Instruction History Management for High-Performance Microprocessors [PDF]
Ravi Bhargava.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2003.
On Load Latency in Low-Power Caches [PDF]
S. Kim, N. Vijaykrishnan, M. J. Irwin, and L. K. John.
International Symposium on Low Power Electronics and Design (ISLPED'03). August 2003.
Routine based OS-aware Microprocessor Resource Adaptation for Run-time Operating System Power Saving [PDF]
Tao Li and Lizy John.
International Symposium on Low Power Electronics and Design (ISLPED). August 2003.
Avoiding Store Misses to Fully Modified Cache Blocks [PDF]
Shiwen Hu and Lizy K. John.
Tech Report TR-030701-01. July 2003.
Using Simulated Annealing to Guide Server Data Placement [PDF]
Juan Rubio and Lizy K. John.
Tech Report TR-030731-01. July 2003.
Improving Dynamic Cluster Assignment for Clustered Trace Cache Processors [PDF]
Ravi Bhargava and Lizy K. John.
30th International Symposium on Computer Architecture (ISCA'03). pp 264-274. June 2003.
Performance and Energy Impact of Instruction-Level Value Predictor Filtering [PDF]
Ravi Bhargava and Lizy K. John.
First Value-Prediction Workshop (VPW1) [held with ISCA'03]. June 2003.
Run-time Modeling and Estimation of Operating System Power Consumption [PDF]
Tao Li and Lizy John.
International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS). pp 160-171. June 2003.
The Role of Return Values in Exploiting Speculative Method-Level Parallelism [PDF]
Shiwen Hu, Ravi Bhargava, and Lizy K. John.
First Value-Prediction Workshop (VPW1) [held with ISCA'03]. June 2003.
Cluster Assignment Strategies for a Clustered Trace Cache Processor [PDF]
Ravi Bhargava and Lizy K. John.
Tech Report TR-030331-01. March 2003.
Comparison of JVM Phases on Data Cache Performance [PPT]
Shiwen Hu and Lizy K. John.
First Workshop on Managed Run Time Workloads. March 2003.
Automatically Selecting Representative Traces for Simulation Based on Cluster Analysis of Instruction Address Hashes [PDF]
Yue Luo and Lizy K. John.
4th Annual Austin Center for Advanced Studies Conference. February 2003.
Benchmarking Internet Servers on Superscalar Machines [PDF]
Yue Luo, Juan Rubio, Lizy John, Pattabi Seshadri, and Alex Mericas.
IEEE Computer. pp 34-40. February 2003.
Interface Design Techniques for Single Chip Systems [PDF]
Robert H. Bell, Jr. and Lizy John.
16th IEEE Conference on VLSI Design. January 2003.


Rehashable BTB: An Adaptive Branch Target Buffer to Improve the Target Predictability of Java Code [PDF]
Tao Li, Ravi Bhargava, and Lizy John.
9th International Conference on High Performance Computing (HiPC). Lecture Notes in Computer Science. Vol. 2552. pp 597-608. December 2002.
Cache Performance in Java Virtual Machines: A Study of Constituent Phases [PDF]
Anand Rajan, Shiwen Hu, and Juan Rubio.
5th Annual IEEE International Workshop on Workload Characterization. November 2002.
Run-time Modeling and Estimation of Operating System Power Consumption [PDF]
Tao Li and Lizy K. John.
Tech Report TR-1101-02. November 2002.
Workload Characterization of Java Server Applications on Two PowerPC Processors [PDF]
Pattabi Seshadri, Lizy John, and Alex Mericas.
3rd Annual Austin Center for Advanced Studies Conference. November 2002.
Modeling and Evaluation of Control Flow Prediction Schemes Using Complete System Simulation and Java Workloads [PDF]
Tao Li, Lizy John, and Robert H. Bell, Jr..
10th IEEE/ACM International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS). October 2002.
Understanding and Improving Operating System Effects in Control Flow Prediction [PDF]
Tao Li, Lizy John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, and Juan Rubio.
10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X). pp 68-80. October 2002.
A Case Study of 3 Internet Benchmarks on 3 Superscalar Machines [PDF]
Yue Luo, Pattabi Seshadri, Juan Rubio, Lizy K. John, and Alex Mericas.
Tech Report TR-020817-01. August 2002.
Access Time and Energy Tradeoffs for Caches in High Frequency Microprocessors [PDF]
Eugene B. John, Stefan Petko, Lizy John, and Jason Law.
45th IEEE International Midwest Symposium on Circuits and Systems. August 2002.
Access Time and Power Characteristics of Various Future File Configurations [PDF]
Jason Law and Byeong Kil Lee.
Tech Report TR-020821-01. August 2002.
Cache Performance in Java Virtual Machines: A Study of Constituent Phases [PDF]
Anand S. Rajan, Juan Rubio, and Lizy K. John.
Tech Report TR-020822-01. August 2002.
The Role of Return Value Prediction in Exploiting Speculative Method-Level Parallelism [PDF]
Shiwen Hu, Ravi Bhargava, and Lizy K. John.
Tech Report TR-020822-02. August 2002.
Implications of Programmable General Purpose Processors for Compression/Encryption Applications [PDF]
Byeong Kil Lee and Lizy John.
IEEE 13th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2002). July 2002.
Improving Transaction Processing using a Hierarchical Computing Server [PDF]
Juan Rubio, Madhavi Valluri, and Lizy K. John.
Tech Report TR-020719-01. July 2002.
A Hybrid-Scheduling Approach for Low-Energy Superscalar Processors
Madhavi G. Valluri, Lizy K. John, and Heather Hanson.
Tech Report TR-020617-01. June 2002.
Access Time and Energy Tradeoffs for Caches in High Frequency Microprocessors [PDF]
Eugene B. John, Stefan Petko, Lizy K. John, and Jason Law.
Tech Report TR-020607-01. June 2002.
Latency and Energy Aware Value Prediction for High-Frequency Processors [PDF]
Ravi Bhargava and Lizy John.
16th ACM Interenational Conference on Supercomputing. pp 45-56. June 2002.
Understanding and Improving Operating System Effects in Control Flow Prediction [PDF]
Tao Li, Lizy K. John, Anand Sivasubramaniam, and Vijaykrishnan Narayanan.
Tech Report TR-000630-02. June 2002.
A Study of Cache performance in Java Virtual Machines [PDF]
Anand Sunder Rajan.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2002.
An Analysis and Critique of MiBench
James Yang.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2002.
Traveling Speculations: An Integrated Prediction Strategy for Wide-Issue Microprocessors [PDF]
Ravi Bhargava, Juan Rubio, and Lizy K. John.
Tech Report TR-020524-01. May 2002.
Value Prediction Design for High-Frequency Microprocessors [PDF]
Ravi Bhargava and Lizy K. John.
Tech Report TR-020508-01. May 2002.
Implications of Programmable General Purpose Processors for Compression/Encryption Applications [PDF]
Byeong Kil Lee and Lizy K. John.
Tech Report LCA-TR-020315. March 2002.
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach [PDF]
Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan, Mahmut Kandemir, Tao Li, and Lizy John.
2002 International Symposium on High Performance Computer Architecture. pp 141-150. February 2002.
Improving Java Performance in Embedded and General-Purpose Processors [HTML]
Ramesh Radhakrishnan, Lizy John, Ravi Bhargava, and Deepu Talla. Edited by Vijaykrishnan Narayanan and Mario L. Wolczko.
Ch. 5. Java Microarchitectures. Kluwer Academic Publishers. pp 79-104. 2002.
Performance Evaluations: Techniques, Tools, and Benchmarks [PDF] [HTML]
Lizy Kurian John.
Computer Engineering Handbook. CRC Press. 2002.


Contemporary Performance Evaluation: Overwhelming Effort? Irrelevant Results? (Position paper)
Lizy John.
NSF workshop. December 2001.
MediaBreeze: A decoupled architecture for accelerating multimedia applications [PDF]
Deepu Talla and Lizy John.
ACM Computer Architecture News. Vol. 29. No. 5. December 2001.
Workload Characterization of Multithreaded Java Servers on Two PowerPC Processors [PDF]
Pattabi Seshadri and Alex Mericas.
4th Annual IEEE International Workshop on Workload Characterization. pp 36-44. December 2001.
CDMA as a Multiprocessor Interconnect Strategy [PDF]
Robert H. Bell, Jr., Chang Yong Kang, Lizy John, and Earl E. Swartzlander, Jr..
35th Asilomar Conference on Signals, Systems, and Computers. November 2001.
Hardware support to reduce overhead in fine-grain media codes [PS]
Deepu Talla, Lizy K. John, and Doug Burger.
Tech Report LCA-TR-011101. November 2001.
Understanding Control Flow Transfer and its Predictability in Java Processing [PDF]
Tao Li and Lizy John.
IEEE International Symposium on Performance Analysis of Systems and Software. pp 65-76. November 2001.
Workload Characterization of Multithreaded Java Servers [PDF]
Yue Luo and Lizy John.
IEEE International Symposium on Performance Analysis of Systems and Software. pp 128-136. November 2001.
A decoupled architecture for accelerating multimedia applications [PDF]
Deepu Talla and Lizy John.
Workshop on Memory Access Decoupled Architectures (held with IEEE International Conference on Parallel Architectures and Compilation Techniques). September 2001.
ADirpNB: A Cost-effective Way to Implement Full Map Directory Based Cache Coherence Protocols [PDF]
Tao Li and Lizy John.
IEEE Transactions on Computers. Vol. 50. No. 9. pp 921-934. September 2001.
Cost-effective Hardware Acceleration of Multimedia Applications [PDF]
Deepu Talla and Lizy John.
IEEE International Conference on Computer Design. pp 415-424. September 2001.
Architectural Techniques to Accelerate Multimedia Applications on General-Purpose Processors [PDF]
Deepu Talla.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2001.
Workload Characterization of Multithreaded Java Servers [PS]
Yue Luo and Lizy K. John.
Tech Report TR-010815-01. August 2001.
Improving Java Performance Using Hardware Translation [PDF]
Ramesh Radhakrishnan, Ravi Bhargava, and Lizy John.
15th ACM International Conference on Supercomputing. pp 427-439. June 2001.
Harvard Architectures [HTML] [HTML]
Lizy Kurian John. Edited by John G. Webster.
Wiley Encyclopedia of Electrical and Electronics Engineering. John Wiley & Sons. April 2001.
Characterization of Web Server Workloads on Three Generations of IBM PowerPC Microarchitectures
Pattabi Seshadri and Lizy John.
IBM CAS Conference. pp 14-29. February 2001.
Java Runtime Systems: Characterization and Architectural Implications [PDF]
Ramesh Radhakrishnan, N. Vijaykrishnan, Lizy John, A. Sivasubramaniam, Juan Rubio, and Jyotsna Sabarinathan.
IEEE Transactions on Computers. Vol. 50. No. 2. pp 131-146. February 2001.
Hierarchical Computing: An Architecture for Efficient Transaction Processing [PS]
Juan Rubio and Lizy K. John.
Tech Report UT-CERC-TR-01-1. January 2001.
Is Compiling for Performance == Compiling for Power? [PDF]
Madhavi Valluri and Lizy John.
5th Annual Workshop on Interaction Between Compilers and Computer Architectures (INTERACT-5) (held with HPCA 2001). January 2001.
Characterizing Operating System Activity in SPECjvm98 Benchmarks
Tao Li, Lizy John, N. Vijaykrishnan, and A. Sivasubramaniam.
Ch. 3. Workload characterization of emerging computer applications. Kluwer Academic Publishers. pp 53-82. 2001.
Is Compiling for Performance == Compiling for Power?
Madhavi Valluri and Lizy John. Edited by Gyunggho Lee and Pen-Chung Yew.
Ch. 6. Interaction Between Compilers and Computer Architectures. Kluwer Academic Publishers. 2001.
Understanding the Impact of x86/NT Computing on Microarchitecture
Ravi Bhargava, Juan Rubio, Srikanth Kannan, Lizy John, David Christie, and Leo Klaes.
Ch. 10. Workload characterization of emerging computer applications. Kluwer Academic Publishers. pp 203-228. 2001.
Workload characterization of emerging computer applications
Edited by Lizy John and Ann M. G. Maynard.
Kluwer Academic Publishers. 2001.


Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures [PDF]
Deepu Talla, Lizy John, Victor Lapinskii, and Brian L. Evans.
IEEE International Conference on Computer Design. September 2000.
Microarchitectural Techniques to Enable Efficient Java Execution [PS.GZ]
Ramesh Radhakrishnan.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2000.
Understanding and Designing for Dependent Store/Load Pairs in High Performance Microprocessors [PDF]
Ravi Bhargava.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2000.
Allowing for ILP in an Embedded Java Processor [PDF]
Ramesh Radhakrishnan, Deepu Talla, and Lizy John.
International Symposium on Computer Architecture. pp 294-305. June 2000.
An Experiment in Memory Subsystem Performance Modeling and Verification
Sanjeev Ghai.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2000.
Performance Characterization of Intel's Internet Streaming SIMD Extensions [PDF]
Vikram Godbole.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2000.
SUPERLEXAA: An Application Analyzer for x86
Srikanth Kannan.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2000.
Using Complete System Simulation to Characterize SPECjvm98 Benchmarks [PDF]
Tao Li, Lizy John, N. Vijaykrishnan, Anand Sivasubramaniam, Jyotsna Sabarinathan, and A. Murthy.
14th ACM International Conference on Supercomputing. pp 22-33. May 2000.
Issues in the Design of Store Buffers in Dynamically Scheduled Processors [PDF]
Ravi Bhargava and Lizy John.
IEEE International Symposium on Performance Analysis of Systems and Software. pp 76-87. April 2000.
Execution Characteristics of Multimedia Applications on a Pentium II Processor [PDF]
Deepu Talla and Lizy John.
IEEE International Performance, Computing, and Communications Conference. pp 516-524. February 2000.
Architectural Issues in Java Runtime Systems [PDF]
Ramesh Radhakrishnan, N. Vijaykrishnan, Lizy John, and Anand Sivasubramaniam.
International Symposium on High Performance Computer Architecture. pp 387-398. January 2000.
Bus Architectures [HTML] [HTML]
Lizy Kurian John. Edited by Zainalabedin Navabi and David R. Kaeli.
Ch. 2. Vol. Computer Science and Engineering. EOLSS: Encyclopedia of Technology, Information, and Systems Management Resources. UNESCO. 2000.
Data Placement Techniques for Interleaved Memories
Lizy John.
The Computer Journal. Vol. 43. No. 2. pp 138-151. 2000.
Workload Characterization for Computer System Design
Edited by Lizy John and Ann M. G. Maynard.
Kluwer Academic Publishers. 2000.


A Study of Instruction Level Parallelism in Contemporary Computer Applications [PS]
Jyotsna Sabarinathan.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 1999.
Annex Cache: A Cache Assist to Implement Selective Caching [PDF]
Lizy John, Tao Li, and A. Subramanian.
Journal of Microprocessors and Microsystems. Vol. 23. No. 8-9. pp 537-551. December 1999.
The Implementation of a High Speed Interconnect for a Server-Oriented Memory Subsystem
Jody Joyner.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 1999.
An evolutionary computation embedded IIR LMS algorithm [PDF]
Deepu Talla, S. S. Rao, and Lizy John.
International Conference on Signal Processing Applications and Technology. November 1999.
A Decoupled Translate Execute (DTE) Architecture to Improve Performance of Java Execution [PDF]
Ramesh Radhakrishnan and Lizy John.
Workshop on Hardware Support or Objects and Microarchitectures for Java (held with ICCD-99). October 1999.
Characterization of Java Applications at Bytecode and Ultra-SPARC Machine Code Levels [PDF]
Ramesh Radhakrishnan, Juan Rubio, and Lizy John.
IEEE International Conference on Computer Design. pp 281-284. October 1999.
On the Use of Pseudorandom Sequences for High Speed Resource Allocatiors in Superscalar Processors [PDF]
S. Srinivasan and Lizy John.
IEEE International Conference on Computer Design. pp 124-130. October 1999.
Performance Evaluation of Configurable Hardware Features on the AMD-K5 [PDF]
Mike Clark and Lizy John.
IEEE International Conference on Computer Design. pp 102-107. October 1999.
A Performance Study of Modern Web Applications [PS]
Ramesh Radhakrishnan and Lizy John.
International Euro-Par Conference. Lecture Notes in Computer Science. Vol. 1685. pp 239-247. August 1999.
Performance Evaluation and Benchmarking of Native Signal Processing [PS]
Deepu Talla and Lizy John.
International Euro-Par Conference. Lecture Notes in Computer Science. Vol. 1685. pp 266-270. August 1999.
Quantifying the effectiveness of MMX in native signal processing [PDF]
Deepu Talla and Lizy John.
IEEE Mid-West Symposium on Circuits and Systems. pp 18-21. August 1999.
Execution Characteristics of JIT Compilers [PS]
Ramesh Radhakrishnan, Juan Rubio, N. Vijaykrishnan, and Lizy K. John.
Tech Report TR-990717-01. July 1999.
Exploiting SIMD Parallelism in DSP and Multimedia Algorithms using the AltiVec Technology [PDF]
H. Nguyen and Lizy John.
ACM International Conference on Supercomputing. pp 11-20. June 1999.
Benchmarking CORBA and Java for the Web
Poorva Murarka.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 1999.
Characterization of Java Applications at the ByteCode Level
Juan Rubio.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 1999.
Program Characterization for System Performance Evaluation
Purnima Vasudevan.
Department of Electrical and Computer Engineering, The University of Texas at Austin. May 1999.
Novel Low Power Static Energy recovery Adder [PDF]
Roy Shalem, Eugene John, and Lizy John.
Great Lakes Symposium on VLSI. pp 380-383. March 1999.
Accurately Modeling Speculative Instruction Fetching in Trace-Driven Simulation [PDF]
Ravi Bhargava, Lizy John, and Francisco Matus.
IEEE Performance, Computing, and Communications Conference. pp 65-71. February 1999.
Contrasting Branch Characteristics and Branch Predictor Performance of C++ and C Programs
David Tang, Ann M. G. Maynard, and Lizy John.
IEEE Performance, Computing, and Communications Conference. pp 275-283. February 1999.
The Effects of Memory Access Ordering on Multiple Issue Uniprocessor Performance [PS]
Brian Grayson, Lizy John, and Craig Chase.
IEEE Performance, Computing, and Communications Conference. pp 293-302. February 1999.
Formal Verification of Snoop Based Cache Coherence Protocol Using Symbolic Model Checking [PS]
S. Srinivasan, P. Chabra, P. Jaini, Adnan Aziz, and Lizy John.
12th International Conference on VLSI Design. pp 288-293. January 1999.
Web Workload Characterization at a Microarchitectural Level
Ramesh Radhakrishnan and Lizy John.
2nd Workshop on Computer Architecture Evaluation using Commercial Workloads (held with HPCA-5). January 1999.
Bit-Slice Computers [HTML] [HTML]
Lizy K. John and Eugene B. John. Edited by John G. Webster.
Wiley Encyclopedia of Electrical and Electronics Engineering. John Wiley & Sons. 1999.
Dynamically Adjustable Memory Chips [PS]
Lizy John.
VLSI Design Journal. Vol. 10. No. 2. pp 203-215. 1999.


Evaluating MMX Technology Using DSP and Multimedia Applications [PDF]
Ravi Bhargava, Lizy John, Brian L. Evans, and Ramesh Radhakrishnan.
IEEE Symposium on Microarchitecture. pp 37-46. December 1998.
Execution Characteristics of Object Oriented Programs on the UltraSPARC-II [PS]
Ramesh Radhakrishnan and Lizy John.
International Conference on High Performance Computing (HiPC). pp 202-211. December 1998.
Exploiting Instruction Reuse to Enhance Microprocessor Simulation [PDF]
Ravi Bhargava, Lizy K. John, and Francisco Matus.
Tech Report TR-981223-01. December 1998.
Workload Characterization: Methodology and Case Studies (Based on the First Workshop on Workload Characterization)
Edited by Lizy John and Ann M. G. Maynard.
IEEE Computer Society. November 1998.
Workload Characterization: Motivation, Goals, and Methodolgy
Lizy John, Purnima Vasudevan, and Jyotsna Sabarinathan. Edited by Lizy John and Ann M. G. Maynard.
Workload Characterization: Methodology and Case Studies. IEEE Computer Society. pp 3-14. November 1998.
Code Coalescing Unit: A Mechanism to Facilitate Load Store Data Communication [PS]
Lizy John, Y. Teh, F. Matus, and Craig Chase.
IEEE International Conference on Computer Design. pp 550-557. October 1998.
Contrasting Branch Characteristics and Branch Predictor Performance of C++ and C Programs
Dachih-Tang.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 1998.
Static Energy Recovery Logic for Low Power Adder Design
Roy Shalem.
Department of Electrical and Computer Engineering, The University of Texas at Austin. August 1998.
Characterization of MMX Enhanced DSP and Multimedia Applications on a General Purpose Processor
Ravi Bhargava, Ramesh Radhakrishnan, Brian L. Evans, and Lizy John.
Workshop on Performance Analysis and its Impact on Design. pp 16-23. June 1998.
Understanding the Branch Performance of Object Oriented Workloads [PS]
Workshop on Performance Analysis and its Impact on Design. pp 110-121. June 1998.
Investigating the Effectiveness of a Third Level Cache [PS]
Sanjeev Ghai, Jody Joyner, and Lizy K. John.
Tech Report TR-980501-01. May 1998.
Design of a Highly Reconfigurable Interconnect for Array Processors [PS]
Lizy John and Eugene B. John.
IEEE Transactions on VLSI. pp 150-157. March 1998.
FPGA Model of MIPS R2000 CPU (won best paper award)
March 1998.
A Novel Memory Bus Driver/Receiver Architecture for Higher Throughput [PS]
G. Beers and Lizy John.
11th International Conference on VLSI Design. pp 259-264. January 1998.
Hybrid Tree: A Scalable Optoelectronic Interconnection Network for Parallel Computing
Eugene John, F. Hudson, and Lizy John.
31st Annual Hawaii International Conference on System Sciences. Vol. VII. pp 466-474. January 1998.


Improving Performance of Processors with Small Register Set using Code Coalescing Unit
Yin Teh.
Department of Electrical and Computer Engineering, The University of Texas at Austin. December 1997.
Design and Performance Evaluation of a Cache Assist to Implement Selective Caching [PS]
Lizy John and A. Subramanian.
IEEE International Conference on Computer Design. pp 510-518. October 1997.
Improving Memory Access Performance
August 1997.
Experience Teaching a Senior Level Course on Digital Design Using FPGAs
Lizy John.
IEEE International Conference on Microelectronic Systems Education. pp 97-98. July 1997.
Half-day tutorial on Rapid Prototyping Using FPGAs
Lizy John.
MSE'97. July 1997.
c_ICE: A Compiler-Based Instruction Cache Exclusion Scheme
Lizy John and Ramesh Radhakrishnan.
Newsletter of the Technical Committee on Computer Architecture (TCCA). pp 60-61. June 1997.
Modeling and Analysis of the Difference-Bit Cache [PS]
A. Kulkarni, N. Chander, S. Pillai, and Lizy John.
Great Lakes Symposium on VLSI. pp 140-145. March 1997.
c_ICE: A Compiler-Based Instruction Cache Exclusion Scheme
Lizy John and Ramesh Radhakrishnan.
Workshop on Interaction Between Compilers and Computer Architecture. February 1997.


A Decoupled Architecture with a CISC-Style Access Processor and a RISC-Sytle Execute Processor
Lizy John.
IEEE VLSI Workshop. November 1996.
Improving the Parallelism and Concurrency in Decoupled Architectures [PS]
Lizy John and Ramesh Radhakrishnan.
8th IEEE Symposium on Parallel and Distributed Processing. pp 130-137. August 1996.
A Performance Model for Prioritized Multiple-Bus Multiprocessor Systems [PS]
Lizy John and Yu-cheng Liu.
IEEE Transactions on Computers. Vol. 45. No. 5. pp 580-588. May 1996.
VaWiRAM: A Variable Width Random Access Memory Module [PS]
Lizy John.
9th International Conference on VLSI Design. pp 219-224. January 1996.


Investigating the Use of Cache as a Local Memory [PS]
Lizy John, Raghu Reddy, Vijay Kammila, and Peter Maurer.
International Conference on High Performance Computing (HiPC). pp 117-122. December 1995.
Classification and Performance Evaluation of Instruction Buffering Techniques [HTML]
Lizy John. Edited by C. M. Krishna.
Performance Modeling for Computer Architects. IEEE Computer Society Press. pp 94-103. September 1995.
Design and VLSI Implementation of an Address Generation Coprocessor [PS]
Paul T. Hulina, Lee D. Coraor, Lizy Kurian, and Eugene John.
IEEE Proceedings on Computers and Digital Techniques. Vol. 142. No. 2. pp 145-151. March 1995.
A Comparative Evaluation of Software Techniques to Hide Memory Latency [PS]
Lizy John, Vinod Reddy, Paul Hulina, and Lee Coraor.
28th Annual Hawaii International Conference on System Sciences. Vol. I. pp 229-238. January 1995.
Design of a Highly Reconfigurable Interconnect for Array Processors [PS]
Lizy Kurian, Daniel Brewer, and Eugene John.
8th International Conference on VLSI Design. pp 321-325. January 1995.
Program Balance and Its Impact on High Performance RISC Architectures [PS] [PDF]
Lizy Kurian, Vinod Reddy, Paul Hulina, and Lee Coraor.
International Symposium on High Performance Computer Architecture. pp 370-379. January 1995.


A Performance Model for Prioritized Multiple Bus Multiprocessor systems [PS]
Lizy Kurian and Yu-cheng Liu.
IEEE Symposium on Parallel and Distributed Processing. pp 577-584. October 1994.
Memory Latency Effects in Decoupled Architectures [PS]
Lizy Kurian, Paul T. Hulina, and Lee D. Coraor.
IEEE Transactions on Computers. Vol. 43. No. 10. pp 1129-1139. October 1994.
Module Partitioning and Interlaced Data Placement schemes to reduce Conflicts in Interleaved Memories [PS]
Lizy Kurian, Bermjae Choi, Paul T. Hulina, and Lee D. Coraor.
23rd International Conference on Parallel Processing. Vol. 1. pp 212-219. August 1994.


Expected and Obtained Performance from Decoupled Architectures
Lizy Kurian, Paul T. Hulina, and Lee D. Coraor.
Supercomputing Conference. November 1992.
Role of an Access Processor in a RISC Environment
Lizy Kurian, Paul T. Hulina, and Lee D. Coraor.
Supercomputing Conference. November 1992.
Design and VLSI Implementation of an Access Processor for a Decoupled Architecture [PS]
Paul T. Hulina, Lizy Kurian, Eugene John, and Lee D. Coraor.
Journal of Microprocessors and Microsystems. Vol. 16. No. 5. pp 237-247. May 1992.
Memory Latency Effects in Decoupled Architectures with a Single Memory Module [PS]
Lizy Kurian, Paul T. Hulina, and Lee D. Coraor.
19th International Symposium On Computer Architecture. pp 236-245. May 1992.


Effect of Hot Spots on Multiprocessor Systems Using Circuit Switched Interconnection Networks [PS]
Lizy Kurian and Matthew J. Thazhuthaveetil.
20th International Conference on Parallel Processing. Vol. I. pp 554-557. August 1991.
Classification and Performance Evaluation of Instruction Buffering Techniques [PDF]
Lizy Kurian, Paul T. Hulina, Lee D. Coraor, and Dhamir N. Mannai.
18th International Symposium on Computer Architecture. pp 150-159. May 1991.