Research Topics
Ultra-Low-Power Edge AI & Weightless Neural Networks
Focuses on deploying intelligent capabilities on severely resource-constrained edge and wearable devices. We pioneer the use of Weightless Neural Networks (WNNs), LUT-based Neuro-Symbolic systems, and Edge Vision Transformers that offer extreme energy efficiency and low-latency inference for real-time sensing applications (like arrhythmia detection) without relying on traditional arithmetic operations.
Architectures and Systems for Large Language Models & Deep Learning
Investigating and optimizing hardware and systems for training, fine-tuning, and serving Large Language Models (LLMs) and Deep Learning models. Our research tackles multi-tenant LLM serving bottlenecks, KV cache optimizations, low-rank adaptation performance, and the impacts of voltage droops and hardware reliability on large-scale AI workloads.
Memory Systems for Multicore and Many-core Architectures
As microprocessors continue to scale in core counts, the memory bottleneck is becoming more critical. We are currently looking at different memory configurations, hierarchies and data partitioning algorithms that can minimize the number of off-chip (or off-node) memory accesses and minimize the latencies observed by processing units. We investigate new structures to make the memory hierarchy efficient, including hybrid and die-stacked memory management, as well as microarchitectural techniques to assist the operating system.
Processing-In-Memory (PIM) and Near-Data Computing
Addressing the "memory wall" by moving computation closer to data. We design processing-in-memory (PIM) and near-memory accelerators that support sparsity-aware graph neural networks, bit-serial digital logic, and linear programming algorithms. By performing computing in situ or very close to the data, we significantly reduce data movement overheads, latency, and power consumption.
FPGA Architecture and Modeling
Applying machine learning to revolutionize the electronic design automation (EDA) pipeline and FPGA modeling. We develop predictive ML models for pre-silicon power and area estimation, cross-FPGA power prediction from high-level languages, and we maintain open-source High-Level Synthesis (HLS) datasets to empower the broader hardware CAD research community.
Workload Characterization and Performance Evaluation
Workload characterization and identification of bottlenecks allows computer architects to design computer systems that yield high performance and energy-efficient operation. We focus on in-depth characterization of emerging workloads, ranging from multi-GPU configurations and async memory transfers to distributed AI training workloads and large-scale cloud applications. Utilizing abstract metrics, program behavior models, and proxy workloads, we simplify the performance evaluation problem for future data center and hyperscale architectures.