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Jian Chen earned his Ph.D degree in Computer Engineering from the University of Texas at Austin in 2011. He is working at Intel as a performance architec. He received his B.E. degree (2002) and M.E. degree (2005) both in Electrical Engineering from Shanghai Jiao Tong University. Before joining in UT-Austin, he worked in IBM CRL Shanghai Lab.

Chen's research interests include but not limited to CMP on-chip resource management, performance modeling using inherent program characteristics, and low power micro-architecture/ VLSI design. He is currently working on resource demand analysis for single-ISA heterogeneous computing, which could lead to energy efficient program scheduling as well as proactive light-weight resource management in heterogeneous CMP systems. He is a student member of IEEE and ACM.