Many of the publications listed below are copyrighted by IEEE or ACM. LCA owns copyrights of all unpublished manuscripts listed below. Personal use of these materials is permitted. However, permission to reprint or replublish these materials for resale or redistribution purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works,must be obtained from the IEEE/ACM/LCA.
| Automated Microprocessor Stressmark Generation [PDF] |
| Ajay Joshi, Lieven Eeckhout, Lizy K. John, and Ciji Isen. |
| The 14th International Symposium on High Performance Computer Architecture (HPCA) . February 2008. |
| Analysis of Redundency and Application Balance in the SPEC CPU2006 Benchmark Suite [PDF] |
| Aashish Phansalkar, Ajay Joshi, and Lizy K. John. |
| The 34th International Symposium on Computer Architecture (ISCA) . June 2007. |
| Complete System Power Estimation: A Trickle-Down Approach Based on Performance Events [PDF] |
| W. Lloyd Bircher and Lizy K.John. |
| International Symposium on Performance Analysis of Systems and Software. April 2007. |
| Hardware Efficient Piecewise Linear Branch Predictor [PDF] |
| Jiajin Tu, Jian Chen, and Lizy K. John. |
| 20th International Conference on VLSI Design. January 2007. |
| Evaluating Benchmark Subsetting Approaches [PDF] |
| Joshua J.Yi, Resit Sendag, Lieven Eeckhout, Ajay Joshi, David J. Lilja, and Lizy K. John. |
| International Symposium on Workload Characterization. October 2006. |
| Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks [PDF] |
| Ajay Joshi, Lieven Eeckhout, Robert H.Bell Jr., and Lizy K. John. |
| International Symposium on Workload Characterization. October 2006. |
| The DaCapo Benchmarks:Java Benchmarking Development and Analysis [PDF] |
| Stephen M.Blackburn, Robin Garner, Chris Hoffmann, Asjad M. Khan, Kathryn S. McKinley, Rotem Bentzur, Amer Diwan, Daniel Feinberg, Daniel Frampton, Samuel Z.Guyer, Martin Hirzel, Antony Hosking, Maria Jump, Han Lee, J Eliot B Moss, Aashish Phansalkar, Darko Stefanovic, Thomas VanDrunen, Daniel von Dincklage, and Ben Wiedermann. |
| Object Oriented Programming Systems,Languages and Applications 2006(OOPSLA'06). October 2006. |
| Performance Prediction Based on Inherent Program Similarity [PDF] |
| Kenneth Hoste, Aashish Phansalkar, Lieven Eeckhout, Andy Georges, Lizy K. John, and Koen De Bosschere. |
| 15th International Conference on Parallel Architecture and COmpilation Techniques (PACT) . September 2006. |
| Avoiding Store Misses To Fully Modified Cache Blocks [PDF] |
| Shiwen Hu and Lizy K. John. |
| IEEE International Performance Computing and Communications Conference. April 2006. |
| OS-aware Tuning: Improving Instruction Cache Energy Efficiency on System Workloads [PDF] |
| Tao Li and Lizy K. John. |
| IEEE International Performance Computing and Communications Conference. April 2006. |
| Automatic Testcase Synthesis and Performance Model Validation for High Performance PowerPC Processors [PDF] |
| Robert H. Bell, Jr, Rajiv R. Bhatia, Lizy K. John, Jeff Stuecheli, John Griswell, Paul Tu, Louis Capps, Anton Blanchard, and Ravel Thai. |
| IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). March 2006. |
| Evaluating the Efficacy of Statistical Simulation for Early Design Space Exploration |
| Ajay Joshi, Joshua Yi, Robert H. Bell, Jr, Lieven Eeckhout, Lizy K. John, and David Lilja. |
| IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). March 2006. |
| Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation [PDF] |
| Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy John, and Joydeep Ghosh. |
| 17th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2005. |
| Efficient Power Analysis using Synthetic Testcases [PDF] |
| Robert H. Bell, Jr. and Lizy K. John. |
| IEEE International Symposium on Workload Characterization. October 2005. |
| Simulating Commercial Java Throughput Workloads: A Case Study |
| Yue Luo and Lizy John. |
| International Conference on Computer Design (ICCD'05). October 2005. |
| Runtime Identification of Microprocessor Energy Saving Opportunities [PDF] |
| W. Lloyd Bircher, Madhavi Valluri, Lizy John, and Jason Law. |
| International Symposium on Low Power Electronics and Design. pp 275-280. August 2005. |
| Architectural Support for Accelerating Congestion Control Applications in Network Processors |
| Byeong Kil Lee, Lizy K. John, and Eugene John. |
| IEEE 16th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2005). July 2005. |
| Improved Automatic Testcase Synthesis for Performance Model Validation [PDF] |
| Robert H. Bell, Jr. and Lizy K. John. |
| 19th ACM International Conference on Supercomputing. June 2005. |
| Low Power, Low Complexity Instruction Issue Using Compiler Assistance [PDF] |
| Madhavi Valluri, Lizy K. John, and Kathryn McKinley. |
| 19th ACM International Conference on Supercomputing. June 2005. |
| Effective Adaptive Computing Environment Management via Dynamic Optimization [PDF] |
| Shiwen Hu, Madhavi Valluri, and Lizy K. John. |
| International Symposium on Code Generation and Optimization. March 2005. |
| Measuring Program Similarity: Experiments with SPEC CPU Benchmark Suites [PDF] |
| Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John. |
| IEEE International Symposium on Performance Analysis of Systems and Software. March 2005. |
| Improving Server Performance on Transaction Processing Workloads by Enhanced Data Placement [PDF] |
| Juan Rubio, Charles Lefurgy, and Lizy K. John. |
| 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2004. |
| Self-Monitored Adaptive Cache Warm-Up for Microprocessor Simulation [PDF] |
| Yue Luo, Lizy K. John, and Lieven Eeckhout. |
| 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2004. |
| Analysis of the Execution of a Next Generation Application on Superscalar and Grid Processors [PDF] |
| Juan Rubio and Lizy John. |
| IEEE International Conference on Parallel and Distributed Systems. July 2004. |
| Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies [PDF] |
| Lieven Eeckhout, Robert H. Bell, Jr., Bastiaan Stougie, Koen De Bosschere, and Lizy K. John. |
| International Symposium on Computer Architecture (ISCA). pp 350-361. June 2004. |
| NpBench: A Benchmark Suite for Control Plane and Data Plane Applications for Network Processors [PDF] |
| Byeong Kil Lee and Lizy John. |
| International Conference on Computer Design (ICCD'03). October 2003. |
| Exploiting compiler-generated schedules for energy savings in high-performance processors [PDF] |
| Madhavi Valluri, Lizy John, and Heather Hanson. |
| International Symposium on Low Power Electronics and Design (ISLPED'03). August 2003. |
| Facts and myths about media processing on general-purpose processors (Invited Paper) |
| Deepu Talla and Lizy John. |
| IEEE International Conference on Information Technology: Research and Education (Special Session on Technology and Trends in Media Processing). August 2003. |
| On Load Latency in Low-Power Caches [PDF] |
| S. Kim, N. Vijaykrishnan, M. J. Irwin, and L. K. John. |
| International Symposium on Low Power Electronics and Design (ISLPED'03). August 2003. |
| Routine based OS-aware Microprocessor Resource Adaptation for Run-time Operating System Power Saving [PDF] |
| Tao Li and Lizy John. |
| International Symposium on Low Power Electronics and Design (ISLPED). August 2003. |
| Improving Dynamic Cluster Assignment for Clustered Trace Cache Processors [PDF] |
| Ravi Bhargava and Lizy K. John. |
| 30th International Symposium on Computer Architecture (ISCA'03). pp 264-274. June 2003. |
| Run-time Modeling and Estimation of Operating System Power Consumption [PDF] |
| Tao Li and Lizy John. |
| International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS). pp 160-171. June 2003. |
| Interface Design Techniques for Single Chip Systems [PDF] |
| Robert H. Bell, Jr. and Lizy John. |
| 16th IEEE Conference on VLSI Design. January 2003. |
| Rehashable BTB: An Adaptive Branch Target Buffer to Improve the Target Predictability of Java Code [PDF] |
| Tao Li, Ravi Bhargava, and Lizy John. |
| 9th International Conference on High Performance Computing (HiPC). Lecture Notes in Computer Science. Vol. 2552. pp 597-608. December 2002. |
| Modeling and Evaluation of Control Flow Prediction Schemes Using Complete System Simulation and Java Workloads [PDF] |
| Tao Li, Lizy John, and Robert H. Bell, Jr.. |
| 10th IEEE/ACM International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS). October 2002. |
| Understanding and Improving Operating System Effects in Control Flow Prediction [PDF] |
| Tao Li, Lizy John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, and Juan Rubio. |
| 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X). pp 68-80. October 2002. |
| Access Time and Energy Tradeoffs for Caches in High Frequency Microprocessors [PDF] |
| Eugene B. John, Stefan Petko, Lizy John, and Jason Law. |
| 45th IEEE International Midwest Symposium on Circuits and Systems. August 2002. |
| Implications of Programmable General Purpose Processors for Compression/Encryption Applications [PDF] |
| Byeong Kil Lee and Lizy John. |
| IEEE 13th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2002). July 2002. |
| Latency and Energy Aware Value Prediction for High-Frequency Processors [PDF] |
| Ravi Bhargava and Lizy John. |
| 16th ACM Interenational Conference on Supercomputing. pp 45-56. June 2002. |
| Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach [PDF] |
| Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan, Mahmut Kandemir, Tao Li, and Lizy John. |
| 2002 International Symposium on High Performance Computer Architecture. pp 141-150. February 2002. |
| CDMA as a Multiprocessor Interconnect Strategy [PDF] |
| Robert H. Bell, Jr., Chang Yong Kang, Lizy John, and Earl E. Swartzlander, Jr.. |
| 35th Asilomar Conference on Signals, Systems, and Computers. November 2001. |
| Understanding Control Flow Transfer and its Predictability in Java Processing [PDF] |
| Tao Li and Lizy John. |
| IEEE International Symposium on Performance Analysis of Systems and Software. pp 65-76. November 2001. |
| Workload Characterization of Multithreaded Java Servers [PDF] |
| Yue Luo and Lizy John. |
| IEEE International Symposium on Performance Analysis of Systems and Software. pp 128-136. November 2001. |
| Cost-effective Hardware Acceleration of Multimedia Applications [PDF] |
| Deepu Talla and Lizy John. |
| IEEE International Conference on Computer Design. pp 415-424. September 2001. |
| Improving Java Performance Using Hardware Translation [PDF] |
| Ramesh Radhakrishnan, Ravi Bhargava, and Lizy John. |
| 15th ACM International Conference on Supercomputing. pp 427-439. June 2001. |
| Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures [PDF] |
| Deepu Talla, Lizy John, Victor Lapinskii, and Brian L. Evans. |
| IEEE International Conference on Computer Design. September 2000. |
| Allowing for ILP in an Embedded Java Processor [PDF] |
| Ramesh Radhakrishnan, Deepu Talla, and Lizy John. |
| International Symposium on Computer Architecture. pp 294-305. June 2000. |
| Using Complete System Simulation to Characterize SPECjvm98 Benchmarks [PDF] |
| Tao Li, Lizy John, N. Vijaykrishnan, Anand Sivasubramaniam, Jyotsna Sabarinathan, and A. Murthy. |
| 14th ACM International Conference on Supercomputing. pp 22-33. May 2000. |
| Issues in the Design of Store Buffers in Dynamically Scheduled Processors [PDF] |
| Ravi Bhargava and Lizy John. |
| IEEE International Symposium on Performance Analysis of Systems and Software. pp 76-87. April 2000. |
| Execution Characteristics of Multimedia Applications on a Pentium II Processor [PDF] |
| Deepu Talla and Lizy John. |
| IEEE International Performance, Computing, and Communications Conference. pp 516-524. February 2000. |
| Architectural Issues in Java Runtime Systems [PDF] |
| Ramesh Radhakrishnan, N. Vijaykrishnan, Lizy John, and Anand Sivasubramaniam. |
| International Symposium on High Performance Computer Architecture. pp 387-398. January 2000. |
| An evolutionary computation embedded IIR LMS algorithm [PDF] |
| Deepu Talla, S. S. Rao, and Lizy John. |
| International Conference on Signal Processing Applications and Technology. November 1999. |
| Characterization of Java Applications at Bytecode and Ultra-SPARC Machine Code Levels [PDF] |
| Ramesh Radhakrishnan, Juan Rubio, and Lizy John. |
| IEEE International Conference on Computer Design. pp 281-284. October 1999. |
| On the Use of Pseudorandom Sequences for High Speed Resource Allocatiors in Superscalar Processors [PDF] |
| S. Srinivasan and Lizy John. |
| IEEE International Conference on Computer Design. pp 124-130. October 1999. |
| Performance Evaluation of Configurable Hardware Features on the AMD-K5 [PDF] |
| Mike Clark and Lizy John. |
| IEEE International Conference on Computer Design. pp 102-107. October 1999. |
| A Performance Study of Modern Web Applications [PS] |
| Ramesh Radhakrishnan and Lizy John. |
| International Euro-Par Conference. Lecture Notes in Computer Science. Vol. 1685. pp 239-247. August 1999. |
| Performance Evaluation and Benchmarking of Native Signal Processing [PS] |
| Deepu Talla and Lizy John. |
| International Euro-Par Conference. Lecture Notes in Computer Science. Vol. 1685. pp 266-270. August 1999. |
| Quantifying the effectiveness of MMX in native signal processing [PDF] |
| Deepu Talla and Lizy John. |
| IEEE Mid-West Symposium on Circuits and Systems. pp 18-21. August 1999. |
| Exploiting SIMD Parallelism in DSP and Multimedia Algorithms using the AltiVec Technology [PDF] |
| H. Nguyen and Lizy John. |
| ACM International Conference on Supercomputing. pp 11-20. June 1999. |
| Novel Low Power Static Energy recovery Adder [PDF] |
| Roy Shalem, Eugene John, and Lizy John. |
| Great Lakes Symposium on VLSI. pp 380-383. March 1999. |
| Accurately Modeling Speculative Instruction Fetching in Trace-Driven Simulation [PDF] |
| Ravi Bhargava, Lizy John, and Francisco Matus. |
| IEEE Performance, Computing, and Communications Conference. pp 65-71. February 1999. |
| Contrasting Branch Characteristics and Branch Predictor Performance of C++ and C Programs |
| David Tang, Ann M. G. Maynard, and Lizy John. |
| IEEE Performance, Computing, and Communications Conference. pp 275-283. February 1999. |
| The Effects of Memory Access Ordering on Multiple Issue Uniprocessor Performance [PS] |
| Brian Grayson, Lizy John, and Craig Chase. |
| IEEE Performance, Computing, and Communications Conference. pp 293-302. February 1999. |
| Formal Verification of Snoop Based Cache Coherence Protocol Using Symbolic Model Checking [PS] |
| S. Srinivasan, P. Chabra, P. Jaini, Adnan Aziz, and Lizy John. |
| 12th International Conference on VLSI Design. pp 288-293. January 1999. |
| Evaluating MMX Technology Using DSP and Multimedia Applications [PDF] |
| Ravi Bhargava, Lizy John, Brian L. Evans, and Ramesh Radhakrishnan. |
| IEEE Symposium on Microarchitecture. pp 37-46. December 1998. |
| Execution Characteristics of Object Oriented Programs on the UltraSPARC-II [PS] |
| Ramesh Radhakrishnan and Lizy John. |
| International Conference on High Performance Computing (HiPC). pp 202-211. December 1998. |
| Code Coalescing Unit: A Mechanism to Facilitate Load Store Data Communication [PS] |
| Lizy John, Y. Teh, F. Matus, and Craig Chase. |
| IEEE International Conference on Computer Design. pp 550-557. October 1998. |
| A Novel Memory Bus Driver/Receiver Architecture for Higher Throughput [PS] |
| G. Beers and Lizy John. |
| 11th International Conference on VLSI Design. pp 259-264. January 1998. |
| Hybrid Tree: A Scalable Optoelectronic Interconnection Network for Parallel Computing |
| Eugene John, F. Hudson, and Lizy John. |
| 31st Annual Hawaii International Conference on System Sciences. Vol. VII. pp 466-474. January 1998. |
| Design and Performance Evaluation of a Cache Assist to Implement Selective Caching [PS] |
| Lizy John and A. Subramanian. |
| IEEE International Conference on Computer Design. pp 510-518. October 1997. |
| Experience Teaching a Senior Level Course on Digital Design Using FPGAs |
| Lizy John. |
| IEEE International Conference on Microelectronic Systems Education. pp 97-98. July 1997. |
| Modeling and Analysis of the Difference-Bit Cache [PS] |
| A. Kulkarni, N. Chander, S. Pillai, and Lizy John. |
| Great Lakes Symposium on VLSI. pp 140-145. March 1997. |
| Improving the Parallelism and Concurrency in Decoupled Architectures [PS] |
| Lizy John and Ramesh Radhakrishnan. |
| 8th IEEE Symposium on Parallel and Distributed Processing. pp 130-137. August 1996. |
| VaWiRAM: A Variable Width Random Access Memory Module [PS] |
| Lizy John. |
| 9th International Conference on VLSI Design. pp 219-224. January 1996. |
| Investigating the Use of Cache as a Local Memory [PS] |
| Lizy John, Raghu Reddy, Vijay Kammila, and Peter Maurer. |
| International Conference on High Performance Computing (HiPC). pp 117-122. December 1995. |
| A Comparative Evaluation of Software Techniques to Hide Memory Latency [PS] |
| Lizy John, Vinod Reddy, Paul Hulina, and Lee Coraor. |
| 28th Annual Hawaii International Conference on System Sciences. Vol. I. pp 229-238. January 1995. |
| Design of a Highly Reconfigurable Interconnect for Array Processors [PS] |
| Lizy Kurian, Daniel Brewer, and Eugene John. |
| 8th International Conference on VLSI Design. pp 321-325. January 1995. |
| Program Balance and Its Impact on High Performance RISC Architectures [PS] [PDF] |
| Lizy Kurian, Vinod Reddy, Paul Hulina, and Lee Coraor. |
| International Symposium on High Performance Computer Architecture. pp 370-379. January 1995. |
| A Performance Model for Prioritized Multiple Bus Multiprocessor systems [PS] |
| Lizy Kurian and Yu-cheng Liu. |
| IEEE Symposium on Parallel and Distributed Processing. pp 577-584. October 1994. |
| Module Partitioning and Interlaced Data Placement schemes to reduce Conflicts in Interleaved Memories [PS] |
| Lizy Kurian, Bermjae Choi, Paul T. Hulina, and Lee D. Coraor. |
| 23rd International Conference on Parallel Processing. Vol. 1. pp 212-219. August 1994. |
| Memory Latency Effects in Decoupled Architectures with a Single Memory Module [PS] |
| Lizy Kurian, Paul T. Hulina, and Lee D. Coraor. |
| 19th International Symposium On Computer Architecture. pp 236-245. May 1992. |
| Effect of Hot Spots on Multiprocessor Systems Using Circuit Switched Interconnection Networks [PS] |
| Lizy Kurian and Matthew J. Thazhuthaveetil. |
| 20th International Conference on Parallel Processing. Vol. I. pp 554-557. August 1991. |
| Classification and Performance Evaluation of Instruction Buffering Techniques [PDF] |
| Lizy Kurian, Paul T. Hulina, Lee D. Coraor, and Dhamir N. Mannai. |
| 18th International Symposium on Computer Architecture. pp 150-159. May 1991. |
