Many of the publications listed below are copyrighted by IEEE or ACM. LCA owns copyrights of all unpublished manuscripts listed below. Personal use of these materials is permitted. However, permission to reprint or replublish these materials for resale or redistribution purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works,must be obtained from the IEEE/ACM/LCA.
| Applying Statistical Sampling for Fast and Efficient Simulation of Commercial Workloads |
| Ajay Joshi, Yue Luo, and Lizy John. |
| IEEE Transactions on Computers. pp 1520-1533. November 2007. |
| Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation |
| Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy K. John, and Joydeep Ghosh. |
| Accepted in International Journal of High Performance Computing and Networking. Vol. . No. . pp -. 2006. |
| Architectural Enhancements for Network Congestion Control Applications |
| Byeong Kil Lee, , Lizy K. John, and Eugene John. |
| Accepted at IEEE Transactions on VLSI. Vol. . No. . pp -. 2006. |
| Measuring Benchmark Similarity Using Inherent Program Characteristics |
| Ajay Joshi, Aashish Phansalkar, Lieven Eeckhout, and Lizy K. John. |
| Accepted at IEEE Transactions on Computers. Vol. . No. . pp -. 2006. |
| OS-aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems |
| Tao Li, Lizy K. John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, and Juan Rubio. |
| Accepted at IEEE Transactions on Computers. Vol. . No. . pp -. 2006. |
| Operating System Power Minimization through Run-time Processor Resource Adaptation [PDF] |
| Tao Li and Lizy K. John. |
| Journal of Microprocessor and Microsystems. Vol. 30. No. 4. pp 173-224. 2006. |
| Reducing Server Data Traffic using a Hierarchical Computation Model |
| Juan Rubio and Lizy K. John. |
| IEEE Transactions on Parallel and Distributed Systems. Vol. 16. No. 10. pp 933-943. October 2005. |
| Implications of Executing Compression and Encryption Applications on General Purpose Processors |
| Byeong Kil Lee and Lizy K. John. |
| IEEE Transactions on Computers. Vol. 54. No. 7. pp 917-922. July 2005. |
| Adapting Branch-Target Buffer to Improve the Target Predictability of Java Code |
| Tao Li, Ravi Bhargava, and Lizy K. John. |
| ACM Transactions on Architecture and Code Optimization (TACO) . Vol. 2. No. 2. June 2005. |
| BLRL: Accurate and Efficient Warmup for Sampled Processor Simulation [HTML] |
| Lieven Eeckhout, Yue Luo, Koen De Bosschere, and Lizy K. John. |
| The Computer Journal. Vol. 48. No. 4. pp 451-459. May 2005. |
| Efficiently Evaluating Speedup Using Sampled Processor Simulation [PDF] |
| Yue Luo and Lizy K. John. |
| Computer Architecture Letters. Vol. 3. September 2004. |
| Scaling to the End of Silicon with EDGE architectures |
| Doug Burger, Steve Keckler, Katherine S. McKinley, M. Dahlin, Lizy K. John, Calvin Lin, C. R. Moore, J. Burrill, Robert G. McDonald, William Yoder, and The TRIPS team. |
| IEEE Computer. pp 44-55. July 2004. |
| Locality Based On-Line Trace Compression |
| Yue Luo and Lizy K. John. |
| IEEE Transactions on Computers. Vol. 53. No. 6. pp 723-731. June 2004. |
| More on Finding a Single Number to Indicate Overall Performance of a Benchmark Suite |
| Lizy K. John. |
| ACM Computer Architecture News. Vol. 32. No. 1. pp 3-8. March 2004. |
| The Role of Return Values in Exploiting Speculative Method-Level Parallelism [HTML] |
| Shiwen Hu, Ravi Bhargava, and Lizy K. John. |
| The Journal of Instruction-Level Parallelism. Vol. 5. November 2003. |
| Bottlenecks in multimedia processing with SIMD style extensions and architectural enhancements |
| Deepu Talla, Lizy K. John, and Doug Burger. |
| IEEE Transactions on Computers. Vol. 52. No. 8. pp 1015-1031. August 2003. |
| Benchmarking Internet Servers on Superscalar Machines [PDF] |
| Yue Luo, Juan Rubio, Lizy John, Pattabi Seshadri, and Alex Mericas. |
| IEEE Computer. pp 34-40. February 2003. |
| MediaBreeze: A decoupled architecture for accelerating multimedia applications [PDF] |
| Deepu Talla and Lizy John. |
| ACM Computer Architecture News. Vol. 29. No. 5. December 2001. |
| ADirpNB: A Cost-effective Way to Implement Full Map Directory Based Cache Coherence Protocols [PDF] |
| Tao Li and Lizy John. |
| IEEE Transactions on Computers. Vol. 50. No. 9. pp 921-934. September 2001. |
| Java Runtime Systems: Characterization and Architectural Implications [PDF] |
| Ramesh Radhakrishnan, N. Vijaykrishnan, Lizy John, A. Sivasubramaniam, Juan Rubio, and Jyotsna Sabarinathan. |
| IEEE Transactions on Computers. Vol. 50. No. 2. pp 131-146. February 2001. |
| Data Placement Techniques for Interleaved Memories |
| Lizy John. |
| The Computer Journal. Vol. 43. No. 2. pp 138-151. 2000. |
| Annex Cache: A Cache Assist to Implement Selective Caching [PDF] |
| Lizy John, Tao Li, and A. Subramanian. |
| Journal of Microprocessors and Microsystems. Vol. 23. No. 8-9. pp 537-551. December 1999. |
| Dynamically Adjustable Memory Chips [PS] |
| Lizy John. |
| VLSI Design Journal. Vol. 10. No. 2. pp 203-215. 1999. |
| Design of a Highly Reconfigurable Interconnect for Array Processors [PS] |
| Lizy John and Eugene B. John. |
| IEEE Transactions on VLSI. pp 150-157. March 1998. |
| c_ICE: A Compiler-Based Instruction Cache Exclusion Scheme |
| Lizy John and Ramesh Radhakrishnan. |
| Newsletter of the Technical Committee on Computer Architecture (TCCA). pp 60-61. June 1997. |
| A Performance Model for Prioritized Multiple-Bus Multiprocessor Systems [PS] |
| Lizy John and Yu-cheng Liu. |
| IEEE Transactions on Computers. Vol. 45. No. 5. pp 580-588. May 1996. |
| Design and VLSI Implementation of an Address Generation Coprocessor [PS] |
| Paul T. Hulina, Lee D. Coraor, Lizy Kurian, and Eugene John. |
| IEEE Proceedings on Computers and Digital Techniques. Vol. 142. No. 2. pp 145-151. March 1995. |
| Memory Latency Effects in Decoupled Architectures [PS] |
| Lizy Kurian, Paul T. Hulina, and Lee D. Coraor. |
| IEEE Transactions on Computers. Vol. 43. No. 10. pp 1129-1139. October 1994. |
| Design and VLSI Implementation of an Access Processor for a Decoupled Architecture [PS] |
| Paul T. Hulina, Lizy Kurian, Eugene John, and Lee D. Coraor. |
| Journal of Microprocessors and Microsystems. Vol. 16. No. 5. pp 237-247. May 1992. |
| Computer Performance Evaluation and Benchmarking |
| Edited by Lizy John and Lieven Eeckhout. |
| CRC Press. 2005. |
| Workload characterization of emerging computer applications |
| Edited by Lizy John and Ann M. G. Maynard. |
| Kluwer Academic Publishers. 2001. |
| Workload Characterization for Computer System Design |
| Edited by Lizy John and Ann M. G. Maynard. |
| Kluwer Academic Publishers. 2000. |
| Workload Characterization: Methodology and Case Studies (Based on the First Workshop on Workload Characterization) |
| Edited by Lizy John and Ann M. G. Maynard. |
| IEEE Computer Society. November 1998. |
| Improving Java Performance in Embedded and General-Purpose Processors [HTML] |
| Ramesh Radhakrishnan, Lizy John, Ravi Bhargava, and Deepu Talla. Edited by Vijaykrishnan Narayanan and Mario L. Wolczko. |
| Ch. 5. Java Microarchitectures. Kluwer Academic Publishers. pp 79-104. 2002. |
| Performance Evaluations: Techniques, Tools, and Benchmarks [PDF] [HTML] |
| Lizy Kurian John. |
| Computer Engineering Handbook. CRC Press. 2002. |
| Harvard Architectures [HTML] [HTML] |
| Lizy Kurian John. Edited by John G. Webster. |
| Wiley Encyclopedia of Electrical and Electronics Engineering. John Wiley & Sons. April 2001. |
| Characterizing Operating System Activity in SPECjvm98 Benchmarks |
| Tao Li, Lizy John, N. Vijaykrishnan, and A. Sivasubramaniam. |
| Ch. 3. Workload characterization of emerging computer applications. Kluwer Academic Publishers. pp 53-82. 2001. |
| Is Compiling for Performance == Compiling for Power? |
| Madhavi Valluri and Lizy John. Edited by Gyunggho Lee and Pen-Chung Yew. |
| Ch. 6. Interaction Between Compilers and Computer Architectures. Kluwer Academic Publishers. 2001. |
| Understanding the Impact of x86/NT Computing on Microarchitecture |
| Ravi Bhargava, Juan Rubio, Srikanth Kannan, Lizy John, David Christie, and Leo Klaes. |
| Ch. 10. Workload characterization of emerging computer applications. Kluwer Academic Publishers. pp 203-228. 2001. |
| Bus Architectures [HTML] [HTML] |
| Lizy Kurian John. Edited by Zainalabedin Navabi and David R. Kaeli. |
| Ch. 2. Vol. Computer Science and Engineering. EOLSS: Encyclopedia of Technology, Information, and Systems Management Resources. UNESCO. 2000. |
| Bit-Slice Computers [HTML] [HTML] |
| Lizy K. John and Eugene B. John. Edited by John G. Webster. |
| Wiley Encyclopedia of Electrical and Electronics Engineering. John Wiley & Sons. 1999. |
| Workload Characterization: Motivation, Goals, and Methodolgy |
| Lizy John, Purnima Vasudevan, and Jyotsna Sabarinathan. Edited by Lizy John and Ann M. G. Maynard. |
| Workload Characterization: Methodology and Case Studies. IEEE Computer Society. pp 3-14. November 1998. |
| Classification and Performance Evaluation of Instruction Buffering Techniques [HTML] |
| Lizy John. Edited by C. M. Krishna. |
| Performance Modeling for Computer Architects. IEEE Computer Society Press. pp 94-103. September 1995. |
| Automated Microprocessor Stressmark Generation [PDF] |
| Ajay Joshi, Lieven Eeckhout, Lizy K. John, and Ciji Isen. |
| The 14th International Symposium on High Performance Computer Architecture (HPCA) . February 2008. |
| Analysis of Redundency and Application Balance in the SPEC CPU2006 Benchmark Suite [PDF] |
| Aashish Phansalkar, Ajay Joshi, and Lizy K. John. |
| The 34th International Symposium on Computer Architecture (ISCA) . June 2007. |
| Complete System Power Estimation: A Trickle-Down Approach Based on Performance Events [PDF] |
| W. Lloyd Bircher and Lizy K.John. |
| International Symposium on Performance Analysis of Systems and Software. April 2007. |
| Hardware Efficient Piecewise Linear Branch Predictor [PDF] |
| Jiajin Tu, Jian Chen, and Lizy K. John. |
| 20th International Conference on VLSI Design. January 2007. |
| Evaluating Benchmark Subsetting Approaches [PDF] |
| Joshua J.Yi, Resit Sendag, Lieven Eeckhout, Ajay Joshi, David J. Lilja, and Lizy K. John. |
| International Symposium on Workload Characterization. October 2006. |
| Performance Cloning: A Technique for Disseminating Proprietary Applications as Benchmarks [PDF] |
| Ajay Joshi, Lieven Eeckhout, Robert H.Bell Jr., and Lizy K. John. |
| International Symposium on Workload Characterization. October 2006. |
| The DaCapo Benchmarks:Java Benchmarking Development and Analysis [PDF] |
| Stephen M.Blackburn, Robin Garner, Chris Hoffmann, Asjad M. Khan, Kathryn S. McKinley, Rotem Bentzur, Amer Diwan, Daniel Feinberg, Daniel Frampton, Samuel Z.Guyer, Martin Hirzel, Antony Hosking, Maria Jump, Han Lee, J Eliot B Moss, Aashish Phansalkar, Darko Stefanovic, Thomas VanDrunen, Daniel von Dincklage, and Ben Wiedermann. |
| Object Oriented Programming Systems,Languages and Applications 2006(OOPSLA'06). October 2006. |
| Performance Prediction Based on Inherent Program Similarity [PDF] |
| Kenneth Hoste, Aashish Phansalkar, Lieven Eeckhout, Andy Georges, Lizy K. John, and Koen De Bosschere. |
| 15th International Conference on Parallel Architecture and COmpilation Techniques (PACT) . September 2006. |
| Avoiding Store Misses To Fully Modified Cache Blocks [PDF] |
| Shiwen Hu and Lizy K. John. |
| IEEE International Performance Computing and Communications Conference. April 2006. |
| OS-aware Tuning: Improving Instruction Cache Energy Efficiency on System Workloads [PDF] |
| Tao Li and Lizy K. John. |
| IEEE International Performance Computing and Communications Conference. April 2006. |
| Automatic Testcase Synthesis and Performance Model Validation for High Performance PowerPC Processors [PDF] |
| Robert H. Bell, Jr, Rajiv R. Bhatia, Lizy K. John, Jeff Stuecheli, John Griswell, Paul Tu, Louis Capps, Anton Blanchard, and Ravel Thai. |
| IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). March 2006. |
| Evaluating the Efficacy of Statistical Simulation for Early Design Space Exploration |
| Ajay Joshi, Joshua Yi, Robert H. Bell, Jr, Lieven Eeckhout, Lizy K. John, and David Lilja. |
| IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). March 2006. |
| Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation [PDF] |
| Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy John, and Joydeep Ghosh. |
| 17th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2005. |
| Efficient Power Analysis using Synthetic Testcases [PDF] |
| Robert H. Bell, Jr. and Lizy K. John. |
| IEEE International Symposium on Workload Characterization. October 2005. |
| Simulating Commercial Java Throughput Workloads: A Case Study |
| Yue Luo and Lizy John. |
| International Conference on Computer Design (ICCD'05). October 2005. |
| Runtime Identification of Microprocessor Energy Saving Opportunities [PDF] |
| W. Lloyd Bircher, Madhavi Valluri, Lizy John, and Jason Law. |
| International Symposium on Low Power Electronics and Design. pp 275-280. August 2005. |
| Architectural Support for Accelerating Congestion Control Applications in Network Processors |
| Byeong Kil Lee, Lizy K. John, and Eugene John. |
| IEEE 16th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2005). July 2005. |
| Improved Automatic Testcase Synthesis for Performance Model Validation [PDF] |
| Robert H. Bell, Jr. and Lizy K. John. |
| 19th ACM International Conference on Supercomputing. June 2005. |
| Low Power, Low Complexity Instruction Issue Using Compiler Assistance [PDF] |
| Madhavi Valluri, Lizy K. John, and Kathryn McKinley. |
| 19th ACM International Conference on Supercomputing. June 2005. |
| Effective Adaptive Computing Environment Management via Dynamic Optimization [PDF] |
| Shiwen Hu, Madhavi Valluri, and Lizy K. John. |
| International Symposium on Code Generation and Optimization. March 2005. |
| Measuring Program Similarity: Experiments with SPEC CPU Benchmark Suites [PDF] |
| Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John. |
| IEEE International Symposium on Performance Analysis of Systems and Software. March 2005. |
| Improving Server Performance on Transaction Processing Workloads by Enhanced Data Placement [PDF] |
| Juan Rubio, Charles Lefurgy, and Lizy K. John. |
| 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2004. |
| Self-Monitored Adaptive Cache Warm-Up for Microprocessor Simulation [PDF] |
| Yue Luo, Lizy K. John, and Lieven Eeckhout. |
| 16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). October 2004. |
| Analysis of the Execution of a Next Generation Application on Superscalar and Grid Processors [PDF] |
| Juan Rubio and Lizy John. |
| IEEE International Conference on Parallel and Distributed Systems. July 2004. |
| Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies [PDF] |
| Lieven Eeckhout, Robert H. Bell, Jr., Bastiaan Stougie, Koen De Bosschere, and Lizy K. John. |
| International Symposium on Computer Architecture (ISCA). pp 350-361. June 2004. |
| NpBench: A Benchmark Suite for Control Plane and Data Plane Applications for Network Processors [PDF] |
| Byeong Kil Lee and Lizy John. |
| International Conference on Computer Design (ICCD'03). October 2003. |
| Exploiting compiler-generated schedules for energy savings in high-performance processors [PDF] |
| Madhavi Valluri, Lizy John, and Heather Hanson. |
| International Symposium on Low Power Electronics and Design (ISLPED'03). August 2003. |
| Facts and myths about media processing on general-purpose processors (Invited Paper) |
| Deepu Talla and Lizy John. |
| IEEE International Conference on Information Technology: Research and Education (Special Session on Technology and Trends in Media Processing). August 2003. |
| On Load Latency in Low-Power Caches [PDF] |
| S. Kim, N. Vijaykrishnan, M. J. Irwin, and L. K. John. |
| International Symposium on Low Power Electronics and Design (ISLPED'03). August 2003. |
| Routine based OS-aware Microprocessor Resource Adaptation for Run-time Operating System Power Saving [PDF] |
| Tao Li and Lizy John. |
| International Symposium on Low Power Electronics and Design (ISLPED). August 2003. |
| Improving Dynamic Cluster Assignment for Clustered Trace Cache Processors [PDF] |
| Ravi Bhargava and Lizy K. John. |
| 30th International Symposium on Computer Architecture (ISCA'03). pp 264-274. June 2003. |
| Run-time Modeling and Estimation of Operating System Power Consumption [PDF] |
| Tao Li and Lizy John. |
| International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS). pp 160-171. June 2003. |
| Interface Design Techniques for Single Chip Systems [PDF] |
| Robert H. Bell, Jr. and Lizy John. |
| 16th IEEE Conference on VLSI Design. January 2003. |
| Rehashable BTB: An Adaptive Branch Target Buffer to Improve the Target Predictability of Java Code [PDF] |
| Tao Li, Ravi Bhargava, and Lizy John. |
| 9th International Conference on High Performance Computing (HiPC). Lecture Notes in Computer Science. Vol. 2552. pp 597-608. December 2002. |
| Modeling and Evaluation of Control Flow Prediction Schemes Using Complete System Simulation and Java Workloads [PDF] |
| Tao Li, Lizy John, and Robert H. Bell, Jr.. |
| 10th IEEE/ACM International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS). October 2002. |
| Understanding and Improving Operating System Effects in Control Flow Prediction [PDF] |
| Tao Li, Lizy John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, and Juan Rubio. |
| 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X). pp 68-80. October 2002. |
| Access Time and Energy Tradeoffs for Caches in High Frequency Microprocessors [PDF] |
| Eugene B. John, Stefan Petko, Lizy John, and Jason Law. |
| 45th IEEE International Midwest Symposium on Circuits and Systems. August 2002. |
| Implications of Programmable General Purpose Processors for Compression/Encryption Applications [PDF] |
| Byeong Kil Lee and Lizy John. |
| IEEE 13th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2002). July 2002. |
| Latency and Energy Aware Value Prediction for High-Frequency Processors [PDF] |
| Ravi Bhargava and Lizy John. |
| 16th ACM Interenational Conference on Supercomputing. pp 45-56. June 2002. |
| Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach [PDF] |
| Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan, Mahmut Kandemir, Tao Li, and Lizy John. |
| 2002 International Symposium on High Performance Computer Architecture. pp 141-150. February 2002. |
| CDMA as a Multiprocessor Interconnect Strategy [PDF] |
| Robert H. Bell, Jr., Chang Yong Kang, Lizy John, and Earl E. Swartzlander, Jr.. |
| 35th Asilomar Conference on Signals, Systems, and Computers. November 2001. |
| Understanding Control Flow Transfer and its Predictability in Java Processing [PDF] |
| Tao Li and Lizy John. |
| IEEE International Symposium on Performance Analysis of Systems and Software. pp 65-76. November 2001. |
| Workload Characterization of Multithreaded Java Servers [PDF] |
| Yue Luo and Lizy John. |
| IEEE International Symposium on Performance Analysis of Systems and Software. pp 128-136. November 2001. |
| Cost-effective Hardware Acceleration of Multimedia Applications [PDF] |
| Deepu Talla and Lizy John. |
| IEEE International Conference on Computer Design. pp 415-424. September 2001. |
| Improving Java Performance Using Hardware Translation [PDF] |
| Ramesh Radhakrishnan, Ravi Bhargava, and Lizy John. |
| 15th ACM International Conference on Supercomputing. pp 427-439. June 2001. |
| Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures [PDF] |
| Deepu Talla, Lizy John, Victor Lapinskii, and Brian L. Evans. |
| IEEE International Conference on Computer Design. September 2000. |
| Allowing for ILP in an Embedded Java Processor [PDF] |
| Ramesh Radhakrishnan, Deepu Talla, and Lizy John. |
| International Symposium on Computer Architecture. pp 294-305. June 2000. |
| Using Complete System Simulation to Characterize SPECjvm98 Benchmarks [PDF] |
| Tao Li, Lizy John, N. Vijaykrishnan, Anand Sivasubramaniam, Jyotsna Sabarinathan, and A. Murthy. |
| 14th ACM International Conference on Supercomputing. pp 22-33. May 2000. |
| Issues in the Design of Store Buffers in Dynamically Scheduled Processors [PDF] |
| Ravi Bhargava and Lizy John. |
| IEEE International Symposium on Performance Analysis of Systems and Software. pp 76-87. April 2000. |
| Execution Characteristics of Multimedia Applications on a Pentium II Processor [PDF] |
| Deepu Talla and Lizy John. |
| IEEE International Performance, Computing, and Communications Conference. pp 516-524. February 2000. |
| Architectural Issues in Java Runtime Systems [PDF] |
| Ramesh Radhakrishnan, N. Vijaykrishnan, Lizy John, and Anand Sivasubramaniam. |
| International Symposium on High Performance Computer Architecture. pp 387-398. January 2000. |
| An evolutionary computation embedded IIR LMS algorithm [PDF] |
| Deepu Talla, S. S. Rao, and Lizy John. |
| International Conference on Signal Processing Applications and Technology. November 1999. |
| Characterization of Java Applications at Bytecode and Ultra-SPARC Machine Code Levels [PDF] |
| Ramesh Radhakrishnan, Juan Rubio, and Lizy John. |
| IEEE International Conference on Computer Design. pp 281-284. October 1999. |
| On the Use of Pseudorandom Sequences for High Speed Resource Allocatiors in Superscalar Processors [PDF] |
| S. Srinivasan and Lizy John. |
| IEEE International Conference on Computer Design. pp 124-130. October 1999. |
| Performance Evaluation of Configurable Hardware Features on the AMD-K5 [PDF] |
| Mike Clark and Lizy John. |
| IEEE International Conference on Computer Design. pp 102-107. October 1999. |
| A Performance Study of Modern Web Applications [PS] |
| Ramesh Radhakrishnan and Lizy John. |
| International Euro-Par Conference. Lecture Notes in Computer Science. Vol. 1685. pp 239-247. August 1999. |
| Performance Evaluation and Benchmarking of Native Signal Processing [PS] |
| Deepu Talla and Lizy John. |
| International Euro-Par Conference. Lecture Notes in Computer Science. Vol. 1685. pp 266-270. August 1999. |
| Quantifying the effectiveness of MMX in native signal processing [PDF] |
| Deepu Talla and Lizy John. |
| IEEE Mid-West Symposium on Circuits and Systems. pp 18-21. August 1999. |
| Exploiting SIMD Parallelism in DSP and Multimedia Algorithms using the AltiVec Technology [PDF] |
| H. Nguyen and Lizy John. |
| ACM International Conference on Supercomputing. pp 11-20. June 1999. |
| Novel Low Power Static Energy recovery Adder [PDF] |
| Roy Shalem, Eugene John, and Lizy John. |
| Great Lakes Symposium on VLSI. pp 380-383. March 1999. |
| Accurately Modeling Speculative Instruction Fetching in Trace-Driven Simulation [PDF] |
| Ravi Bhargava, Lizy John, and Francisco Matus. |
| IEEE Performance, Computing, and Communications Conference. pp 65-71. February 1999. |
| Contrasting Branch Characteristics and Branch Predictor Performance of C++ and C Programs |
| David Tang, Ann M. G. Maynard, and Lizy John. |
| IEEE Performance, Computing, and Communications Conference. pp 275-283. February 1999. |
| The Effects of Memory Access Ordering on Multiple Issue Uniprocessor Performance [PS] |
| Brian Grayson, Lizy John, and Craig Chase. |
| IEEE Performance, Computing, and Communications Conference. pp 293-302. February 1999. |
| Formal Verification of Snoop Based Cache Coherence Protocol Using Symbolic Model Checking [PS] |
| S. Srinivasan, P. Chabra, P. Jaini, Adnan Aziz, and Lizy John. |
| 12th International Conference on VLSI Design. pp 288-293. January 1999. |
| Evaluating MMX Technology Using DSP and Multimedia Applications [PDF] |
| Ravi Bhargava, Lizy John, Brian L. Evans, and Ramesh Radhakrishnan. |
| IEEE Symposium on Microarchitecture. pp 37-46. December 1998. |
| Execution Characteristics of Object Oriented Programs on the UltraSPARC-II [PS] |
| Ramesh Radhakrishnan and Lizy John. |
| International Conference on High Performance Computing (HiPC). pp 202-211. December 1998. |
| Code Coalescing Unit: A Mechanism to Facilitate Load Store Data Communication [PS] |
| Lizy John, Y. Teh, F. Matus, and Craig Chase. |
| IEEE International Conference on Computer Design. pp 550-557. October 1998. |
| A Novel Memory Bus Driver/Receiver Architecture for Higher Throughput [PS] |
| G. Beers and Lizy John. |
| 11th International Conference on VLSI Design. pp 259-264. January 1998. |
| Hybrid Tree: A Scalable Optoelectronic Interconnection Network for Parallel Computing |
| Eugene John, F. Hudson, and Lizy John. |
| 31st Annual Hawaii International Conference on System Sciences. Vol. VII. pp 466-474. January 1998. |
| Design and Performance Evaluation of a Cache Assist to Implement Selective Caching [PS] |
| Lizy John and A. Subramanian. |
| IEEE International Conference on Computer Design. pp 510-518. October 1997. |
| Experience Teaching a Senior Level Course on Digital Design Using FPGAs |
| Lizy John. |
| IEEE International Conference on Microelectronic Systems Education. pp 97-98. July 1997. |
| Modeling and Analysis of the Difference-Bit Cache [PS] |
| A. Kulkarni, N. Chander, S. Pillai, and Lizy John. |
| Great Lakes Symposium on VLSI. pp 140-145. March 1997. |
| Improving the Parallelism and Concurrency in Decoupled Architectures [PS] |
| Lizy John and Ramesh Radhakrishnan. |
| 8th IEEE Symposium on Parallel and Distributed Processing. pp 130-137. August 1996. |
| VaWiRAM: A Variable Width Random Access Memory Module [PS] |
| Lizy John. |
| 9th International Conference on VLSI Design. pp 219-224. January 1996. |
| Investigating the Use of Cache as a Local Memory [PS] |
| Lizy John, Raghu Reddy, Vijay Kammila, and Peter Maurer. |
| International Conference on High Performance Computing (HiPC). pp 117-122. December 1995. |
| A Comparative Evaluation of Software Techniques to Hide Memory Latency [PS] |
| Lizy John, Vinod Reddy, Paul Hulina, and Lee Coraor. |
| 28th Annual Hawaii International Conference on System Sciences. Vol. I. pp 229-238. January 1995. |
| Design of a Highly Reconfigurable Interconnect for Array Processors [PS] |
| Lizy Kurian, Daniel Brewer, and Eugene John. |
| 8th International Conference on VLSI Design. pp 321-325. January 1995. |
| Program Balance and Its Impact on High Performance RISC Architectures [PS] [PDF] |
| Lizy Kurian, Vinod Reddy, Paul Hulina, and Lee Coraor. |
| International Symposium on High Performance Computer Architecture. pp 370-379. January 1995. |
| A Performance Model for Prioritized Multiple Bus Multiprocessor systems [PS] |
| Lizy Kurian and Yu-cheng Liu. |
| IEEE Symposium on Parallel and Distributed Processing. pp 577-584. October 1994. |
| Module Partitioning and Interlaced Data Placement schemes to reduce Conflicts in Interleaved Memories [PS] |
| Lizy Kurian, Bermjae Choi, Paul T. Hulina, and Lee D. Coraor. |
| 23rd International Conference on Parallel Processing. Vol. 1. pp 212-219. August 1994. |
| Memory Latency Effects in Decoupled Architectures with a Single Memory Module [PS] |
| Lizy Kurian, Paul T. Hulina, and Lee D. Coraor. |
| 19th International Symposium On Computer Architecture. pp 236-245. May 1992. |
| Effect of Hot Spots on Multiprocessor Systems Using Circuit Switched Interconnection Networks [PS] |
| Lizy Kurian and Matthew J. Thazhuthaveetil. |
| 20th International Conference on Parallel Processing. Vol. I. pp 554-557. August 1991. |
| Classification and Performance Evaluation of Instruction Buffering Techniques [PDF] |
| Lizy Kurian, Paul T. Hulina, Lee D. Coraor, and Dhamir N. Mannai. |
| 18th International Symposium on Computer Architecture. pp 150-159. May 1991. |
| On the Object Orientedness of C++ Programs in SPEC CPU 2006 [PDF] |
| Ciji Isen and Lizy John. |
| 2008 SPEC Benchmark Workshop. January 2008. |
| The Return of Synthetic Benchmark [PDF] |
| Ajay M. Joshi, Lieven Eeckhout, and Lizy John. |
| 2008 SPEC Benchmark Workshop. January 2008. |
| Mapping of Applications to Heterogeneous Multi-cores Based on Micro-architecture Independent Characteristics [PDF] |
| Jian Chen, Nidhi Nayyar, and Lizy K. John. |
| Third Workshop on Unique Chips and Systems,ISPASS2007. April 2007. |
| CMP/CMT Scaling of SPECjbb2005 on UltraSPARC T1 [PDF] |
| Dimitris Kaseridis and Lizy K. John. |
| Tenth Workshop on Computer Architecture Evaluation using Commercial Workloads. February 2007. |
| Analyzing the Processor Bottlenecks in SPEC CPU 2000 [PDF] |
| Joshua J. Yi, Ajay Joshi, Resit Sendag, Lieven Eeckhout, and David J. Lilja. |
| 2006 SPEC Benchmark Workshop. January 2006. |
| Performance Prediction Using Program Similarity [PDF] |
| Aashish Phansalkar and Lizy John. |
| 2006 SPEC Benchmark Workshop. January 2006. |
| The Case for Automatic Synthesis of Miniature Benchmarks [PDF] |
| Robert H. Bell Jr. and Lizy K. John. |
| Workshop on Modeling, Benchmarking, and Simulation (held with ISCA-32). June 2005. |
| Deconstructing and Improving Statistical Simulation in HLS [PDF] |
| Robert H. Bell Jr., Lieven Eeckhout, Lizy K. John, and Koen De Bosschere. |
| 3rd Annual Workshop on Duplicating, Deconstructing, and Debunking (WDDD). June 2004. |
| Using Statistical Theory to Study Issues in Microprocessor Simulation [PDF] |
| Yue Luo and Lizy K. John. |
| 5th Annual Austin Center for Advanced Studies Conference. February 2004. |
| Performance and Energy Impact of Instruction-Level Value Predictor Filtering [PDF] |
| Ravi Bhargava and Lizy K. John. |
| First Value-Prediction Workshop (VPW1) [held with ISCA'03]. June 2003. |
| The Role of Return Values in Exploiting Speculative Method-Level Parallelism [PDF] |
| Shiwen Hu, Ravi Bhargava, and Lizy K. John. |
| First Value-Prediction Workshop (VPW1) [held with ISCA'03]. June 2003. |
| Comparison of JVM Phases on Data Cache Performance [PPT] |
| Shiwen Hu and Lizy K. John. |
| First Workshop on Managed Run Time Workloads. March 2003. |
| Automatically Selecting Representative Traces for Simulation Based on Cluster Analysis of Instruction Address Hashes [PDF] |
| Yue Luo and Lizy K. John. |
| 4th Annual Austin Center for Advanced Studies Conference. February 2003. |
| Cache Performance in Java Virtual Machines: A Study of Constituent Phases [PDF] |
| Anand Rajan, Shiwen Hu, and Juan Rubio. |
| 5th Annual IEEE International Workshop on Workload Characterization. November 2002. |
| Workload Characterization of Java Server Applications on Two PowerPC Processors [PDF] |
| Pattabi Seshadri, Lizy John, and Alex Mericas. |
| 3rd Annual Austin Center for Advanced Studies Conference. November 2002. |
| Contemporary Performance Evaluation: Overwhelming Effort? Irrelevant Results? (Position paper) |
| Lizy John. |
| NSF workshop. December 2001. |
| Workload Characterization of Multithreaded Java Servers on Two PowerPC Processors [PDF] |
| Pattabi Seshadri and Alex Mericas. |
| 4th Annual IEEE International Workshop on Workload Characterization. pp 36-44. December 2001. |
| A decoupled architecture for accelerating multimedia applications [PDF] |
| Deepu Talla and Lizy John. |
| Workshop on Memory Access Decoupled Architectures (held with IEEE International Conference on Parallel Architectures and Compilation Techniques). September 2001. |
| Characterization of Web Server Workloads on Three Generations of IBM PowerPC Microarchitectures |
| Pattabi Seshadri and Lizy John. |
| IBM CAS Conference. pp 14-29. February 2001. |
| Is Compiling for Performance == Compiling for Power? [PDF] |
| Madhavi Valluri and Lizy John. |
| 5th Annual Workshop on Interaction Between Compilers and Computer Architectures (INTERACT-5) (held with HPCA 2001). January 2001. |
| A Decoupled Translate Execute (DTE) Architecture to Improve Performance of Java Execution [PDF] |
| Ramesh Radhakrishnan and Lizy John. |
| Workshop on Hardware Support or Objects and Microarchitectures for Java (held with ICCD-99). October 1999. |
| Web Workload Characterization at a Microarchitectural Level |
| Ramesh Radhakrishnan and Lizy John. |
| 2nd Workshop on Computer Architecture Evaluation using Commercial Workloads (held with HPCA-5). January 1999. |
| Characterization of MMX Enhanced DSP and Multimedia Applications on a General Purpose Processor |
| Ravi Bhargava, Ramesh Radhakrishnan, Brian L. Evans, and Lizy John. |
| Workshop on Performance Analysis and its Impact on Design. pp 16-23. June 1998. |
| Understanding the Branch Performance of Object Oriented Workloads [PS] |
|
| Workshop on Performance Analysis and its Impact on Design. pp 110-121. June 1998. |
| FPGA Model of MIPS R2000 CPU (won best paper award) |
|
| March 1998. |
| Improving Memory Access Performance |
|
| August 1997. |
| c_ICE: A Compiler-Based Instruction Cache Exclusion Scheme |
| Lizy John and Ramesh Radhakrishnan. |
| Workshop on Interaction Between Compilers and Computer Architecture. February 1997. |
| Understanding the data memory behavior of benchmarks using Principal Components Analysis [PDF] |
| Saket Kumar. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2004. |
| Characterizing Microprocessor Benchmarks Towards Understanding the Workload Design Space [PDF] |
| Michael Arunkumar. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2003. |
| Memory Access and Computational Behavior of MP3 Encoding [PDF] |
| Michael Lance Karm. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2003. |
| Solutions to High-End Signal Processing Applications |
| Patrick James Peters. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2003. |
| A Study of Cache performance in Java Virtual Machines [PDF] |
| Anand Sunder Rajan. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2002. |
| An Analysis and Critique of MiBench |
| James Yang. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2002. |
| An Experiment in Memory Subsystem Performance Modeling and Verification |
| Sanjeev Ghai. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2000. |
| Performance Characterization of Intel's Internet Streaming SIMD Extensions [PDF] |
| Vikram Godbole. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2000. |
| SUPERLEXAA: An Application Analyzer for x86 |
| Srikanth Kannan. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2000. |
| A Study of Instruction Level Parallelism in Contemporary Computer Applications [PS] |
| Jyotsna Sabarinathan. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. December 1999. |
| The Implementation of a High Speed Interconnect for a Server-Oriented Memory Subsystem |
| Jody Joyner. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. December 1999. |
| Benchmarking CORBA and Java for the Web |
| Poorva Murarka. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 1999. |
| Characterization of Java Applications at the ByteCode Level |
| Juan Rubio. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 1999. |
| Program Characterization for System Performance Evaluation |
| Purnima Vasudevan. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 1999. |
| Contrasting Branch Characteristics and Branch Predictor Performance of C++ and C Programs |
| Dachih-Tang. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 1998. |
| Improving Performance of Processors with Small Register Set using Code Coalescing Unit |
| Yin Teh. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. December 1997. |
| Understanding and Designing for Dependent Store/Load Pairs in High Performance Microprocessors [PDF] |
| Ravi Bhargava. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2000. |
| Static Energy Recovery Logic for Low Power Adder Design |
| Roy Shalem. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 1998. |
| Constructing Adaptable and Scalable Synthetic Benchmarks for Microprocessor Performance Evaluation [PDF] |
| Ajay M. Joshi. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2007. |
| Measuring Program Similarity for Efficient Benchmarking and Performance Analysis of Computer Systems [PDF] |
| Aashish S. Phansalkar. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2007. |
| Automatic Workload Synthesis for Early Design Studies and Performance Model Validation [PDF] |
| Robert H. Bell, Jr. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2005. |
| Efficient Adaptation of Multiple Microprocessor Resources for Energy Reduction Using Dynamic Optimization [PDF] |
| Shiwen Hu. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. December 2005. |
| Improving Sampled Microprocessor Simulation [PDF] |
| Yue Luo. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2005. |
| Network Processor Design: Benchmarks and Architectural Alternatives [PDF] |
| Byeong Kil Lee. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2005. |
| A Hybrid-Scheduling Approach for Energy-Efficient Superscalar Processors [PDF] |
| Madhavi Valluri. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. May 2005. |
| Exploring the Potential of a Hierarchical Computing Model for a Commercial Server [PDF] |
| Juan Rubio. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2004. |
| OS-aware Architecture for Improving Microprocessor Performance and Energy Efficiency [PDF] |
| Tao Li. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2004. |
| Instruction History Management for High-Performance Microprocessors [PDF] |
| Ravi Bhargava. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2003. |
| Architectural Techniques to Accelerate Multimedia Applications on General-Purpose Processors [PDF] |
| Deepu Talla. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2001. |
| Microarchitectural Techniques to Enable Efficient Java Execution [PS.GZ] |
| Ramesh Radhakrishnan. |
| Department of Electrical and Computer Engineering, The University of Texas at Austin. August 2000. |
| Hybrid-Scheduling: A Compile-Time Approach for Energy-Efficient Superscalar Processors (poster) [PDF] [PPT] |
| Madhavi Valluri and Lizy John. |
| IBM Austin Conference on Energy-Efficient Design (ACEED) 2004. March 2004. |
| Keynote Speech [PDF] |
| Lizy K. John. |
| Seventh Workshop on Computer Architecture Evaluation Using Commercial Workloads (CAECW-7). February 2004. |
| Half-day tutorial on Rapid Prototyping Using FPGAs |
| Lizy John. |
| MSE'97. July 1997. |
| A Decoupled Architecture with a CISC-Style Access Processor and a RISC-Sytle Execute Processor |
| Lizy John. |
| IEEE VLSI Workshop. November 1996. |
| Expected and Obtained Performance from Decoupled Architectures |
| Lizy Kurian, Paul T. Hulina, and Lee D. Coraor. |
| Supercomputing Conference. November 1992. |
| Role of an Access Processor in a RISC Environment |
| Lizy Kurian, Paul T. Hulina, and Lee D. Coraor. |
| Supercomputing Conference. November 1992. |
| Measuring Benchmark Similarity Using Inherent Program Characteristics [PDF] |
| Ajay Joshi, Aashish Phansalkar, Lieven Eeckhout, and Lizy John. |
| Tech Report TR-060201-01. February 2006. |
| Simulating Java Commercial Throughput Workload: A Case Study [PDF] |
| Yue Luo and Lizy John. |
| Tech Report TR-050710-01. July 2005. |
| Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation [PDF] |
| Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy John, and Joydeep Ghosh. |
| Tech Report TR-050301-01. March 2005. |
| Measuring Program Similarity [PDF] |
| Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John. |
| Tech Report TR-050127-01. January 2005. |
| Effective Use of Performance Monitoring Counters for Run-Time Prediction of Power [PDF] |
| W. L. Bircher, Jason Law, Madhavi Valluri, and Lizy K. John. |
| Tech Report TR-041104-01. November 2004. |
| Four Generations of SPEC CPU Benchmarks: What has changed and what has not [PDF] |
| Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John. |
| Tech Report TR-041026-01-1. October 2004. |
| Experiments in Automatic Benchmark Synthesis [PDF] |
| Robert H. Bell, Jr. and Lizy K. John. |
| Tech Report TR-040817-01. August 2004. |
| Using Statistical Theory to Study Issues in Microprocessor Simulation [PDF] |
| Yue Luo and Lizy K. John. |
| Tech Report TR-0400225-01. February 2004. |
| Analyzing Program Behavior of SPECint2000 Benchmark Suite using Principal Components Analysis [PDF] |
| Aashish Phansalkar and Lizy K. John. |
| Tech Report TR-040122-01. January 2004. |
| More on finding a Single Number to indicate Overall Performance of a Benchmark Suite [PDF] |
| Lizy K. John. |
| Tech Report TR-040126-01. January 2004. |
| Power Modeling in SDRAMs [PDF] |
| Ajay Joshi, Srirarm Sambamurthy, Saket Kumar, and Lizy John. |
| Tech Report TR-040126-02. January 2004. |
| Basic Block Simulation Granularity, Basic Block Maps, and Benchmark Synthesis Using Statistical Simulation [PDF] |
| Robert H. Bell, Jr. and Lizy K. John. |
| Tech Report TR-031119-01. November 2003. |
| Development and Characterization of Control-plane Network Workloads [PDF] |
| Byeong Kil Lee and Lizy K. John. |
| Tech Report TR-030827-01. August 2003. |
| Avoiding Store Misses to Fully Modified Cache Blocks [PDF] |
| Shiwen Hu and Lizy K. John. |
| Tech Report TR-030701-01. July 2003. |
| Using Simulated Annealing to Guide Server Data Placement [PDF] |
| Juan Rubio and Lizy K. John. |
| Tech Report TR-030731-01. July 2003. |
| Cluster Assignment Strategies for a Clustered Trace Cache Processor [PDF] |
| Ravi Bhargava and Lizy K. John. |
| Tech Report TR-030331-01. March 2003. |
| Run-time Modeling and Estimation of Operating System Power Consumption [PDF] |
| Tao Li and Lizy K. John. |
| Tech Report TR-1101-02. November 2002. |
| A Case Study of 3 Internet Benchmarks on 3 Superscalar Machines [PDF] |
| Yue Luo, Pattabi Seshadri, Juan Rubio, Lizy K. John, and Alex Mericas. |
| Tech Report TR-020817-01. August 2002. |
| Access Time and Power Characteristics of Various Future File Configurations [PDF] |
| Jason Law and Byeong Kil Lee. |
| Tech Report TR-020821-01. August 2002. |
| Cache Performance in Java Virtual Machines: A Study of Constituent Phases [PDF] |
| Anand S. Rajan, Juan Rubio, and Lizy K. John. |
| Tech Report TR-020822-01. August 2002. |
| The Role of Return Value Prediction in Exploiting Speculative Method-Level Parallelism [PDF] |
| Shiwen Hu, Ravi Bhargava, and Lizy K. John. |
| Tech Report TR-020822-02. August 2002. |
| Improving Transaction Processing using a Hierarchical Computing Server [PDF] |
| Juan Rubio, Madhavi Valluri, and Lizy K. John. |
| Tech Report TR-020719-01. July 2002. |
| A Hybrid-Scheduling Approach for Low-Energy Superscalar Processors |
| Madhavi G. Valluri, Lizy K. John, and Heather Hanson. |
| Tech Report TR-020617-01. June 2002. |
| Access Time and Energy Tradeoffs for Caches in High Frequency Microprocessors [PDF] |
| Eugene B. John, Stefan Petko, Lizy K. John, and Jason Law. |
| Tech Report TR-020607-01. June 2002. |
| Understanding and Improving Operating System Effects in Control Flow Prediction [PDF] |
| Tao Li, Lizy K. John, Anand Sivasubramaniam, and Vijaykrishnan Narayanan. |
| Tech Report TR-000630-02. June 2002. |
| Traveling Speculations: An Integrated Prediction Strategy for Wide-Issue Microprocessors [PDF] |
| Ravi Bhargava, Juan Rubio, and Lizy K. John. |
| Tech Report TR-020524-01. May 2002. |
| Value Prediction Design for High-Frequency Microprocessors [PDF] |
| Ravi Bhargava and Lizy K. John. |
| Tech Report TR-020508-01. May 2002. |
| Implications of Programmable General Purpose Processors for Compression/Encryption Applications [PDF] |
| Byeong Kil Lee and Lizy K. John. |
| Tech Report LCA-TR-020315. March 2002. |
| Hardware support to reduce overhead in fine-grain media codes [PS] |
| Deepu Talla, Lizy K. John, and Doug Burger. |
| Tech Report LCA-TR-011101. November 2001. |
| Workload Characterization of Multithreaded Java Servers [PS] |
| Yue Luo and Lizy K. John. |
| Tech Report TR-010815-01. August 2001. |
| Hierarchical Computing: An Architecture for Efficient Transaction Processing [PS] |
| Juan Rubio and Lizy K. John. |
| Tech Report UT-CERC-TR-01-1. January 2001. |
| Execution Characteristics of JIT Compilers [PS] |
| Ramesh Radhakrishnan, Juan Rubio, N. Vijaykrishnan, and Lizy K. John. |
| Tech Report TR-990717-01. July 1999. |
| Exploiting Instruction Reuse to Enhance Microprocessor Simulation [PDF] |
| Ravi Bhargava, Lizy K. John, and Francisco Matus. |
| Tech Report TR-981223-01. December 1998. |
| Investigating the Effectiveness of a Third Level Cache [PS] |
| Sanjeev Ghai, Jody Joyner, and Lizy K. John. |
| Tech Report TR-980501-01. May 1998. |
